Lines Matching +full:host +full:- +full:irq +full:- +full:gpios
2 * Copyright (c) 2010, 2012-2015 Wind River Systems, Inc.
6 * SPDX-License-Identifier: Apache-2.0
36 #include <zephyr/irq.h>
97 * RXRDY pin will go inactive when there are no more charac-
102 * reached, the RXRDY pin will go low active. Once it is acti-
107 * FIFO Mode (FCR0 = 1, FCR3 = 0) and there are no charac-
173 #define IIRC(dev) (((struct uart_xec_dev_data *)(dev)->data)->iir_cache)
242 struct uart_xec_device_config const *dev_cfg = dev->config; in uart_clr_slp_en()
244 z_mchp_xec_pcr_periph_sleep(dev_cfg->pcr_idx, dev_cfg->pcr_bitpos, 0); in uart_clr_slp_en()
249 struct uart_xec_device_config const *dev_cfg = dev->config; in uart_xec_girq_clr()
251 mchp_soc_ecia_girq_src_clr(dev_cfg->girq_id, dev_cfg->girq_pos); in uart_xec_girq_clr()
263 struct uart_xec_device_config const *dev_cfg = dev->config; in uart_clr_slp_en()
265 if (dev_cfg->pcr_bitpos == MCHP_PCR2_UART0_POS) { in uart_clr_slp_en()
267 } else if (dev_cfg->pcr_bitpos == MCHP_PCR2_UART1_POS) { in uart_clr_slp_en()
276 struct uart_xec_device_config const *dev_cfg = dev->config; in uart_xec_girq_clr()
278 MCHP_GIRQ_SRC(dev_cfg->girq_id) = BIT(dev_cfg->girq_pos); in uart_xec_girq_clr()
290 const struct uart_xec_device_config * const dev_cfg = dev->config; in set_baud_rate()
291 struct uart_xec_dev_data * const dev_data = dev->data; in set_baud_rate()
292 struct uart_regs *regs = dev_cfg->regs; in set_baud_rate()
296 if ((baud_rate != 0U) && (dev_cfg->sys_clk_freq != 0U)) { in set_baud_rate()
299 * (uint32_t)(dev_cfg->sys_clk_freq / (16.0 * baud_rate) + 0.5) in set_baud_rate()
301 divisor = ((dev_cfg->sys_clk_freq + (baud_rate << 3)) in set_baud_rate()
305 lcr_cache = regs->LCR; in set_baud_rate()
306 regs->LCR = LCR_DLAB | lcr_cache; in set_baud_rate()
307 regs->RTXB = (unsigned char)(divisor & 0xff); in set_baud_rate()
309 regs->IER = (unsigned char)((divisor >> 8) & 0x7f); in set_baud_rate()
312 regs->LCR = lcr_cache; in set_baud_rate()
314 dev_data->uart_config.baudrate = baud_rate; in set_baud_rate()
320 * MCHP XEC UART defaults to reset if external Host VCC_PWRGD is inactive.
327 struct uart_xec_dev_data * const dev_data = dev->data; in uart_xec_configure()
328 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_configure()
329 struct uart_regs *regs = dev_cfg->regs; in uart_xec_configure()
335 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_configure()
339 dev_data->fcr_cache = 0U; in uart_xec_configure()
340 dev_data->iir_cache = 0U; in uart_xec_configure()
343 regs->CFG_SEL &= ~(MCHP_UART_LD_CFG_RESET_VCC | in uart_xec_configure()
346 regs->ACTV |= MCHP_UART_LD_ACTIVATE; in uart_xec_configure()
348 set_baud_rate(dev, cfg->baudrate); in uart_xec_configure()
353 switch (cfg->data_bits) { in uart_xec_configure()
367 ret = -ENOTSUP; in uart_xec_configure()
371 switch (cfg->stop_bits) { in uart_xec_configure()
379 ret = -ENOTSUP; in uart_xec_configure()
383 switch (cfg->parity) { in uart_xec_configure()
391 ret = -ENOTSUP; in uart_xec_configure()
395 dev_data->uart_config = *cfg; in uart_xec_configure()
398 regs->LCR = uart_cfg.data_bits | uart_cfg.stop_bits | uart_cfg.parity; in uart_xec_configure()
400 regs->MCR = MCR_OUT2 | MCR_RTS | MCR_DTR; in uart_xec_configure()
407 dev_data->fcr_cache = FCR_FIFO | FCR_MODE0 | FCR_FIFO_8 | FCR_RCVRCLR | in uart_xec_configure()
409 regs->IIR_FCR = dev_data->fcr_cache; in uart_xec_configure()
412 lcr_cache = regs->LCR; in uart_xec_configure()
413 regs->LCR = LCR_DLAB | lcr_cache; in uart_xec_configure()
414 regs->SCR = regs->RTXB; in uart_xec_configure()
415 regs->LCR = lcr_cache; in uart_xec_configure()
418 regs->IER = 0; in uart_xec_configure()
421 k_spin_unlock(&dev_data->lock, key); in uart_xec_configure()
429 struct uart_xec_dev_data *data = dev->data; in uart_xec_config_get()
431 cfg->baudrate = data->uart_config.baudrate; in uart_xec_config_get()
432 cfg->parity = data->uart_config.parity; in uart_xec_config_get()
433 cfg->stop_bits = data->uart_config.stop_bits; in uart_xec_config_get()
434 cfg->data_bits = data->uart_config.data_bits; in uart_xec_config_get()
435 cfg->flow_ctrl = data->uart_config.flow_ctrl; in uart_xec_config_get()
447 (void)gpio_pin_interrupt_configure(gpio, (find_msb_set(pins) - 1), in uart_xec_wake_handler()
461 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_pm_action()
462 struct uart_regs *regs = dev_cfg->regs; in uart_xec_pm_action()
467 regs->ACTV = MCHP_UART_LD_ACTIVATE; in uart_xec_pm_action()
471 regs->ACTV = 0; in uart_xec_pm_action()
472 if ((dev_cfg->wakeup_source) && (dev_cfg->wakerx_gpio.port != NULL)) { in uart_xec_pm_action()
473 ret = gpio_pin_interrupt_configure_dt(&dev_cfg->wakerx_gpio, in uart_xec_pm_action()
482 return -ENOTSUP; in uart_xec_pm_action()
509 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_init()
510 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_init()
515 ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT); in uart_xec_init()
520 ret = uart_xec_configure(dev, &dev_data->uart_config); in uart_xec_init()
526 dev_cfg->irq_config_func(dev); in uart_xec_init()
533 if ((dev_cfg->wakeup_source) && (dev_cfg->wakerx_gpio.port != NULL)) { in uart_xec_init()
537 BIT(dev_cfg->wakerx_gpio.pin)); in uart_xec_init()
539 ret = gpio_add_callback(dev_cfg->wakerx_gpio.port, &uart_xec_wake_cb); in uart_xec_init()
556 * @return 0 if a character arrived, -1 if the input buffer if empty.
560 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_poll_in()
561 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_poll_in()
562 struct uart_regs *regs = dev_cfg->regs; in uart_xec_poll_in()
563 int ret = -1; in uart_xec_poll_in()
564 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_poll_in()
566 if ((regs->LSR & LSR_RXRDY) != 0) { in uart_xec_poll_in()
568 *c = regs->RTXB; in uart_xec_poll_in()
572 k_spin_unlock(&dev_data->lock, key); in uart_xec_poll_in()
591 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_poll_out()
592 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_poll_out()
593 struct uart_regs *regs = dev_cfg->regs; in uart_xec_poll_out()
594 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_poll_out()
596 while ((regs->LSR & LSR_THRE) == 0) { in uart_xec_poll_out()
600 regs->RTXB = c; in uart_xec_poll_out()
602 k_spin_unlock(&dev_data->lock, key); in uart_xec_poll_out()
615 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_err_check()
616 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_err_check()
617 struct uart_regs *regs = dev_cfg->regs; in uart_xec_err_check()
618 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_err_check()
619 int check = regs->LSR & LSR_EOB_MASK; in uart_xec_err_check()
621 k_spin_unlock(&dev_data->lock, key); in uart_xec_err_check()
640 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_fifo_fill()
641 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_fifo_fill()
642 struct uart_regs *regs = dev_cfg->regs; in uart_xec_fifo_fill()
644 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_fifo_fill()
646 for (i = 0; (i < size) && (regs->LSR & LSR_THRE) != 0; i++) { in uart_xec_fifo_fill()
650 regs->RTXB = tx_data[i]; in uart_xec_fifo_fill()
653 k_spin_unlock(&dev_data->lock, key); in uart_xec_fifo_fill()
670 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_fifo_read()
671 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_fifo_read()
672 struct uart_regs *regs = dev_cfg->regs; in uart_xec_fifo_read()
674 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_fifo_read()
676 for (i = 0; (i < size) && (regs->LSR & LSR_RXRDY) != 0; i++) { in uart_xec_fifo_read()
677 rx_data[i] = regs->RTXB; in uart_xec_fifo_read()
680 k_spin_unlock(&dev_data->lock, key); in uart_xec_fifo_read()
692 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_tx_enable()
693 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_tx_enable()
694 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_tx_enable()
695 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_tx_enable()
697 regs->IER |= IER_TBE; in uart_xec_irq_tx_enable()
699 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_tx_enable()
709 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_tx_disable()
710 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_tx_disable()
711 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_tx_disable()
712 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_tx_disable()
714 regs->IER &= ~(IER_TBE); in uart_xec_irq_tx_disable()
716 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_tx_disable()
720 * @brief Check if Tx IRQ has been raised
724 * @return 1 if an IRQ is ready, 0 otherwise
728 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_tx_ready()
729 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_tx_ready()
733 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_tx_ready()
747 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_tx_complete()
748 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_tx_complete()
749 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_tx_complete()
751 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_tx_complete()
753 if ((regs->IER & IER_TBE) || in uart_xec_irq_tx_complete()
754 ((regs->LSR & (LSR_TEMT | LSR_THRE)) != (LSR_TEMT | LSR_THRE))) { in uart_xec_irq_tx_complete()
760 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_tx_complete()
772 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_rx_enable()
773 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_rx_enable()
774 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_rx_enable()
775 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_rx_enable()
777 regs->IER |= IER_RXRDY; in uart_xec_irq_rx_enable()
779 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_rx_enable()
789 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_rx_disable()
790 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_rx_disable()
791 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_rx_disable()
792 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_rx_disable()
794 regs->IER &= ~(IER_RXRDY); in uart_xec_irq_rx_disable()
796 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_rx_disable()
800 * @brief Check if Rx IRQ has been raised
804 * @return 1 if an IRQ is ready, 0 otherwise
808 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_rx_ready()
809 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_rx_ready()
813 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_rx_ready()
825 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_err_enable()
826 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_err_enable()
827 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_err_enable()
828 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_err_enable()
830 regs->IER |= IER_LSR; in uart_xec_irq_err_enable()
832 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_err_enable()
840 * @return 1 if an IRQ is ready, 0 otherwise
844 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_err_disable()
845 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_err_disable()
846 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_err_disable()
847 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_err_disable()
849 regs->IER &= ~(IER_LSR); in uart_xec_irq_err_disable()
851 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_err_disable()
855 * @brief Check if any IRQ is pending
859 * @return 1 if an IRQ is pending, 0 otherwise
863 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_is_pending()
864 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_is_pending()
868 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_is_pending()
882 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_irq_update()
883 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_irq_update()
884 struct uart_regs *regs = dev_cfg->regs; in uart_xec_irq_update()
885 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_update()
887 IIRC(dev) = regs->IIR_FCR; in uart_xec_irq_update()
889 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_update()
895 * @brief Set the callback function pointer for IRQ.
904 struct uart_xec_dev_data * const dev_data = dev->data; in uart_xec_irq_callback_set()
905 k_spinlock_key_t key = k_spin_lock(&dev_data->lock); in uart_xec_irq_callback_set()
907 dev_data->cb = cb; in uart_xec_irq_callback_set()
908 dev_data->cb_data = cb_data; in uart_xec_irq_callback_set()
910 k_spin_unlock(&dev_data->lock, key); in uart_xec_irq_callback_set()
922 struct uart_xec_dev_data * const dev_data = dev->data; in uart_xec_isr()
924 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_isr()
925 struct uart_regs *regs = dev_cfg->regs; in uart_xec_isr()
928 rx_ready = ((regs->LSR & LSR_RXRDY) == LSR_RXRDY) ? 1 : 0; in uart_xec_isr()
937 if (dev_data->cb) { in uart_xec_isr()
938 dev_data->cb(dev, dev_data->cb_data); in uart_xec_isr()
967 const struct uart_xec_device_config * const dev_cfg = dev->config; in uart_xec_line_ctrl_set()
968 struct uart_xec_dev_data *dev_data = dev->data; in uart_xec_line_ctrl_set()
969 struct uart_regs *regs = dev_cfg->regs; in uart_xec_line_ctrl_set()
980 key = k_spin_lock(&dev_data->lock); in uart_xec_line_ctrl_set()
981 mdc = regs->MCR; in uart_xec_line_ctrl_set()
994 regs->MCR = mdc; in uart_xec_line_ctrl_set()
995 k_spin_unlock(&dev_data->lock, key); in uart_xec_line_ctrl_set()
999 return -ENOTSUP; in uart_xec_line_ctrl_set()
1069 * wakerx-gpios = <&gpio_140_176 25 GPIO_ACTIVE_HIGH>;
1070 * wakeup-source;