Lines Matching +full:location +full:- +full:tx
5 * SPDX-License-Identifier: Apache-2.0
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95 /* Has any enabled uart instance hw-flow-control enabled? */
102 /* Has any enabled usart instance hw-flow-control enabled? */
177 const struct uart_gecko_config *config = dev->config; in uart_gecko_poll_in()
178 uint32_t flags = USART_StatusGet(config->base); in uart_gecko_poll_in()
181 *c = USART_Rx(config->base); in uart_gecko_poll_in()
185 return -1; in uart_gecko_poll_in()
190 const struct uart_gecko_config *config = dev->config; in uart_gecko_poll_out()
192 USART_Tx(config->base, c); in uart_gecko_poll_out()
197 const struct uart_gecko_config *config = dev->config; in uart_gecko_err_check()
198 uint32_t flags = USART_IntGet(config->base); in uart_gecko_err_check()
213 USART_IntClear(config->base, USART_IF_RXOF | in uart_gecko_err_check()
224 const struct uart_gecko_config *config = dev->config; in uart_gecko_fifo_fill()
227 while ((len - num_tx > 0) && in uart_gecko_fifo_fill()
228 (config->base->STATUS & USART_STATUS_TXBL)) { in uart_gecko_fifo_fill()
230 config->base->TXDATA = (uint32_t)tx_data[num_tx++]; in uart_gecko_fifo_fill()
239 const struct uart_gecko_config *config = dev->config; in uart_gecko_fifo_read()
242 while ((len - num_rx > 0) && in uart_gecko_fifo_read()
243 (config->base->STATUS & USART_STATUS_RXDATAV)) { in uart_gecko_fifo_read()
245 rx_data[num_rx++] = (uint8_t)config->base->RXDATA; in uart_gecko_fifo_read()
253 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_enable()
256 USART_IntEnable(config->base, mask); in uart_gecko_irq_tx_enable()
261 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_disable()
264 USART_IntDisable(config->base, mask); in uart_gecko_irq_tx_disable()
269 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_complete()
270 uint32_t flags = USART_IntGet(config->base); in uart_gecko_irq_tx_complete()
272 USART_IntClear(config->base, USART_IF_TXC); in uart_gecko_irq_tx_complete()
279 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_tx_ready()
280 uint32_t flags = USART_IntGetEnabled(config->base); in uart_gecko_irq_tx_ready()
287 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_enable()
290 USART_IntEnable(config->base, mask); in uart_gecko_irq_rx_enable()
295 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_disable()
298 USART_IntDisable(config->base, mask); in uart_gecko_irq_rx_disable()
303 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_full()
304 uint32_t flags = USART_IntGet(config->base); in uart_gecko_irq_rx_full()
311 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_rx_ready()
314 return (config->base->IEN & mask) in uart_gecko_irq_rx_ready()
320 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_err_enable()
322 USART_IntEnable(config->base, USART_IF_RXOF | in uart_gecko_irq_err_enable()
329 const struct uart_gecko_config *config = dev->config; in uart_gecko_irq_err_disable()
331 USART_IntDisable(config->base, USART_IF_RXOF | in uart_gecko_irq_err_disable()
350 struct uart_gecko_data *data = dev->data; in uart_gecko_irq_callback_set()
352 data->callback = cb; in uart_gecko_irq_callback_set()
353 data->cb_data = cb_data; in uart_gecko_irq_callback_set()
358 struct uart_gecko_data *data = dev->data; in uart_gecko_isr()
360 if (data->callback) { in uart_gecko_isr()
361 data->callback(dev, data->cb_data); in uart_gecko_isr()
374 const struct uart_gecko_config *config = dev->config; in uart_gecko_init_pins()
376 /* Configure RX and TX */ in uart_gecko_init_pins()
377 GPIO_PinModeSet(config->pin_rx.port, config->pin_rx.pin, in uart_gecko_init_pins()
378 config->pin_rx.mode, config->pin_rx.out); in uart_gecko_init_pins()
379 GPIO_PinModeSet(config->pin_tx.port, config->pin_tx.pin, in uart_gecko_init_pins()
380 config->pin_tx.mode, config->pin_tx.out); in uart_gecko_init_pins()
384 config->base->ROUTEPEN = USART_ROUTEPEN_RXPEN | USART_ROUTEPEN_TXPEN; in uart_gecko_init_pins()
385 config->base->ROUTELOC0 = in uart_gecko_init_pins()
386 (config->loc_tx << _USART_ROUTELOC0_TXLOC_SHIFT) | in uart_gecko_init_pins()
387 (config->loc_rx << _USART_ROUTELOC0_RXLOC_SHIFT); in uart_gecko_init_pins()
388 config->base->ROUTELOC1 = _USART_ROUTELOC1_RESETVALUE; in uart_gecko_init_pins()
390 /* For olders SOCs with only one pin location */ in uart_gecko_init_pins()
391 config->base->ROUTE = USART_ROUTE_RXPEN | USART_ROUTE_TXPEN in uart_gecko_init_pins()
392 | (config->loc << 8); in uart_gecko_init_pins()
394 GPIO->USARTROUTE[USART_NUM(config->base)].ROUTEEN = in uart_gecko_init_pins()
396 GPIO->USARTROUTE[USART_NUM(config->base)].TXROUTE = in uart_gecko_init_pins()
397 (config->pin_tx.pin << _GPIO_USART_TXROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
398 (config->pin_tx.port << _GPIO_USART_TXROUTE_PORT_SHIFT); in uart_gecko_init_pins()
399 GPIO->USARTROUTE[USART_NUM(config->base)].RXROUTE = in uart_gecko_init_pins()
400 (config->pin_rx.pin << _GPIO_USART_RXROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
401 (config->pin_rx.port << _GPIO_USART_RXROUTE_PORT_SHIFT); in uart_gecko_init_pins()
406 if (config->hw_flowcontrol) { in uart_gecko_init_pins()
407 GPIO_PinModeSet(config->pin_rts.port, config->pin_rts.pin, in uart_gecko_init_pins()
408 config->pin_rts.mode, config->pin_rts.out); in uart_gecko_init_pins()
409 GPIO_PinModeSet(config->pin_cts.port, config->pin_cts.pin, in uart_gecko_init_pins()
410 config->pin_cts.mode, config->pin_cts.out); in uart_gecko_init_pins()
413 config->base->ROUTEPEN = in uart_gecko_init_pins()
419 config->base->ROUTELOC1 = in uart_gecko_init_pins()
420 (config->loc_rts << _USART_ROUTELOC1_RTSLOC_SHIFT) | in uart_gecko_init_pins()
421 (config->loc_cts << _USART_ROUTELOC1_CTSLOC_SHIFT); in uart_gecko_init_pins()
423 GPIO->USARTROUTE[USART_NUM(config->base)].ROUTEEN = in uart_gecko_init_pins()
429 GPIO->USARTROUTE[USART_NUM(config->base)].RTSROUTE = in uart_gecko_init_pins()
430 (config->pin_rts.pin << _GPIO_USART_RTSROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
431 (config->pin_rts.port << _GPIO_USART_RTSROUTE_PORT_SHIFT); in uart_gecko_init_pins()
432 GPIO->USARTROUTE[USART_NUM(config->base)].CTSROUTE = in uart_gecko_init_pins()
433 (config->pin_cts.pin << _GPIO_USART_CTSROUTE_PIN_SHIFT) | in uart_gecko_init_pins()
434 (config->pin_cts.port << _GPIO_USART_CTSROUTE_PORT_SHIFT); in uart_gecko_init_pins()
452 const struct uart_gecko_config *config = dev->config; in uart_gecko_init()
459 err = clock_control_on(config->clock_dev, (clock_control_subsys_t)&config->clock_cfg); in uart_gecko_init()
464 CMU_ClockEnable(config->clock, true); in uart_gecko_init()
468 usartInit.baudrate = config->baud_rate; in uart_gecko_init()
470 usartInit.hwFlowControl = config->hw_flowcontrol ? in uart_gecko_init()
473 USART_InitAsync(config->base, &usartInit); in uart_gecko_init()
476 err = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in uart_gecko_init()
486 config->irq_config_func(dev); in uart_gecko_init()
495 __maybe_unused const struct uart_gecko_config *config = dev->config; in uart_gecko_pm_action()
500 /* Wait for TX FIFO to flush before suspending */ in uart_gecko_pm_action()
501 while (!(USART_StatusGet(config->base) & USART_STATUS_TXIDLE)) { in uart_gecko_pm_action()
510 return -ENOTSUP; in uart_gecko_pm_action()
553 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, tx, irq), \
554 DT_INST_IRQ_BY_NAME(idx, tx, priority), \
558 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \
577 "DTS location-* properties must have identical value")
611 "DTS location-rts and location-cts are mandatory")), \
698 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, tx, irq), \
699 DT_INST_IRQ_BY_NAME(idx, tx, priority), \
703 irq_enable(DT_INST_IRQ_BY_NAME(idx, tx, irq)); \