96 static uint32_t rcar_mmc_read_reg32(const struct device *dev, uint32_t reg)  in rcar_mmc_read_reg32()  function
148 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_INFO2);  in rcar_mmc_card_busy()
166 	uint32_t info2 = rcar_mmc_read_reg32(dev, RCAR_MMC_INFO2);  in rcar_mmc_check_errors()
210 	while ((rcar_mmc_read_reg32(dev, reg) & flag) != state) {  in rcar_mmc_poll_reg_flags_check_err()
224 		if (check_dma_errors && rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_INFO2)) {  in rcar_mmc_poll_reg_flags_check_err()
303 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_SOFT_RST);  in rcar_mmc_reset()
373 	uint32_t mmc_clk_ctl = rcar_mmc_read_reg32(dev, RCAR_MMC_CLKCTL);  in rcar_mmc_enable_clock()
465 		uint32_t rsp_127_104 = rcar_mmc_read_reg32(dev, RCAR_MMC_RSP76);  in rcar_mmc_extract_resp()
466 		uint32_t rsp_103_72 = rcar_mmc_read_reg32(dev, RCAR_MMC_RSP54);  in rcar_mmc_extract_resp()
467 		uint32_t rsp_71_40 = rcar_mmc_read_reg32(dev, RCAR_MMC_RSP32);  in rcar_mmc_extract_resp()
468 		uint32_t rsp_39_8 = rcar_mmc_read_reg32(dev, RCAR_MMC_RSP10);  in rcar_mmc_extract_resp()
482 		cmd->response[0] = rcar_mmc_read_reg32(dev, RCAR_MMC_RSP10);  in rcar_mmc_extract_resp()
555 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_MODE);  in rcar_mmc_dma_rx_tx_data()
565 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_EXTMODE);  in rcar_mmc_dma_rx_tx_data()
579 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_INFO1_MASK);  in rcar_mmc_dma_rx_tx_data()
589 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_INFO2);  in rcar_mmc_dma_rx_tx_data()
616 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_EXTMODE);  in rcar_mmc_dma_rx_tx_data()
740 	cmd_reg = rcar_mmc_read_reg32(dev, RCAR_MMC_CMD);  in rcar_mmc_sd_buf_rx_tx_data()
783 		info2_reg = rcar_mmc_read_reg32(dev, RCAR_MMC_INFO2);  in rcar_mmc_sd_buf_rx_tx_data()
853 	info1_reg = rcar_mmc_read_reg32(dev, RCAR_MMC_INFO1);  in rcar_mmc_rx_tx_data()
946 		reg = rcar_mmc_read_reg32(dev, RCAR_MMC_INFO1);  in rcar_mmc_request()
1137 	mmc_clk_ctl = rcar_mmc_read_reg32(dev, RCAR_MMC_CLKCTL);  in rcar_mmc_set_clk_rate()
1238 	mmc_option_reg = rcar_mmc_read_reg32(dev, RCAR_MMC_OPTION);  in rcar_mmc_set_bus_width()
1269 	if_mode_reg = rcar_mmc_read_reg32(dev, RCAR_MMC_IF_MODE);  in rcar_mmc_set_ddr_mode()
1555 	return !!(rcar_mmc_read_reg32(dev, RCAR_MMC_INFO1) & RCAR_MMC_INFO1_CD);  in rcar_mmc_get_card_present()
1710 		smpcmp_bitmask |= !rcar_mmc_read_reg32(dev, RENESAS_SDHI_SCC_SMPCMP) << tap_idx;  in rcar_mmc_execute_tuning()
1817 	reg = rcar_mmc_read_reg32(dev, RENESAS_SDHI_SCC_RVSREQ);  in rcar_mmc_retune_if_needed()
1822 	scc_tapset = rcar_mmc_read_reg32(dev, RENESAS_SDHI_SCC_TAPSET);  in rcar_mmc_retune_if_needed()
1980 	uint32_t mmc_clk_ctl = rcar_mmc_read_reg32(dev, RCAR_MMC_CLKCTL);  in rcar_mmc_disable_scc()
1994 	reg = rcar_mmc_read_reg32(dev, RENESAS_SDHI_SCC_CKSEL);  in rcar_mmc_disable_scc()
1999 	reg = rcar_mmc_read_reg32(dev, RENESAS_SDHI_SCC_TMPPORT2);  in rcar_mmc_disable_scc()
2009 	reg = rcar_mmc_read_reg32(dev, RENESAS_SDHI_SCC_RVSCNTL);  in rcar_mmc_disable_scc()
2038 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_EXTMODE);  in rcar_mmc_init_controller_regs()
2044 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_MODE);  in rcar_mmc_init_controller_regs()
2049 	data->ver = rcar_mmc_read_reg32(dev, RCAR_MMC_VERSION);  in rcar_mmc_init_controller_regs()
2057 	reg = rcar_mmc_read_reg32(dev, RCAR_MMC_OPTION);  in rcar_mmc_init_controller_regs()
2098 	uint32_t dma_info1 = rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_INFO1);  in rcar_mmc_irq_handler()
2099 	uint32_t dma_info2 = rcar_mmc_read_reg32(dev, RCAR_MMC_DMA_INFO2);  in rcar_mmc_irq_handler()