4  * SPDX-License-Identifier: Apache-2.0
51  * Puse_OFF_width = (1/Fpwm) * (256 - duty_cycle) seconds
52  * where duty_cycle is an 8-bit value 0 to 255.
53  * Prescale is derived from DELAY register LOW_DELAY 12-bit field
54  * Duty cycle is derived from LIMITS register MINIMUM 8-bit field
61  * BBLED PWM mode duty cycle specified by 8-bit MIN field of the LIMITS register
140  * DELAY.LO = pre-scaler = [0, 4095]
147 	const struct pwm_bbled_xec_config * const cfg = dev->config;  in xec_pwmbb_progam_pwm()
148 	struct bbled_regs * const regs = cfg->regs;  in xec_pwmbb_progam_pwm()
151 	val = regs->limits & ~(XEC_PWM_BBLED_LIM_MIN_MSK);  in xec_pwmbb_progam_pwm()
153 	regs->limits = val;  in xec_pwmbb_progam_pwm()
155 	val = regs->delay & ~(XEC_PWM_BBLED_DLY_LO_MSK);  in xec_pwmbb_progam_pwm()
157 	regs->delay = val;  in xec_pwmbb_progam_pwm()
160 	regs->config |= BIT(XEC_PWM_BBLED_CFG_EN_UPDATE_POS);  in xec_pwmbb_progam_pwm()
162 	val = regs->config & ~(XEC_PWM_BBLED_CFG_MODE_MSK);  in xec_pwmbb_progam_pwm()
164 	regs->config = val;  in xec_pwmbb_progam_pwm()
169  * where Source Frequency is either 48 MHz or 32768 Hz and LP is the 12-bit low delay
176 	const struct pwm_bbled_xec_config * const cfg = dev->config;  in pwm_bbled_xec_get_cycles_per_sec()
177 	struct bbled_regs * const regs = cfg->regs;  in pwm_bbled_xec_get_cycles_per_sec()
180 		return -EIO;  in pwm_bbled_xec_get_cycles_per_sec()
184 		if (regs->config & BIT(XEC_PWM_BBLED_CFG_CLK_SRC_48M_POS)) {  in pwm_bbled_xec_get_cycles_per_sec()
195  * pulse == 0 -> pin should be constant inactive level
196  * pulse >= period -> pin should be constant active level
216 	const struct pwm_bbled_xec_config * const cfg = dev->config;  in pwm_bbled_xec_set_cycles()
217 	struct bbled_regs * const regs = cfg->regs;  in pwm_bbled_xec_set_cycles()
222 		return -EIO;  in pwm_bbled_xec_set_cycles()
226 		return -ENOTSUP;  in pwm_bbled_xec_set_cycles()
233 		regs->config = (regs->config & ~XEC_PWM_BBLED_CFG_MODE_MSK)  in pwm_bbled_xec_set_cycles()
235 		regs->limits &= ~XEC_PWM_BBLED_LIM_MIN_MSK;  in pwm_bbled_xec_set_cycles()
236 		regs->delay &= ~(XEC_PWM_BBLED_DLY_LO_MSK);  in pwm_bbled_xec_set_cycles()
239 		regs->config = (regs->config & ~XEC_PWM_BBLED_CFG_MODE_MSK)  in pwm_bbled_xec_set_cycles()
241 		regs->limits &= ~XEC_PWM_BBLED_LIM_MIN_MSK;  in pwm_bbled_xec_set_cycles()
242 		regs->delay &= ~(XEC_PWM_BBLED_DLY_LO_MSK);  in pwm_bbled_xec_set_cycles()
246 			ld--;  in pwm_bbled_xec_set_cycles()
271 	const struct pwm_bbled_xec_config *const devcfg = dev->config;  in pwm_bbled_xec_pm_action()
272 	struct bbled_regs * const regs = devcfg->regs;  in pwm_bbled_xec_pm_action()
273 	struct bbled_xec_data * const data = dev->data;  in pwm_bbled_xec_pm_action()
282 	if ((!devcfg->enable_low_power_32K) &&  in pwm_bbled_xec_pm_action()
283 			(!(regs->config & BIT(XEC_PWM_BBLED_CFG_CLK_SRC_48M_POS)))) {  in pwm_bbled_xec_pm_action()
289 		ret = pinctrl_apply_state(devcfg->pcfg, PINCTRL_STATE_DEFAULT);  in pwm_bbled_xec_pm_action()
295 		if ((data->config & XEC_PWM_BBLED_CFG_MODE_MSK) != XEC_PWM_BBLED_CFG_MODE_OFF) {  in pwm_bbled_xec_pm_action()
297 			regs->config |= (data->config & XEC_PWM_BBLED_CFG_MODE_MSK);  in pwm_bbled_xec_pm_action()
298 			regs->config |= BIT(XEC_PWM_BBLED_CFG_EN_UPDATE_POS);  in pwm_bbled_xec_pm_action()
300 			data->config = XEC_PWM_BBLED_CFG_MODE_OFF;  in pwm_bbled_xec_pm_action()
304 		if ((regs->config & XEC_PWM_BBLED_CFG_MODE_MSK) != XEC_PWM_BBLED_CFG_MODE_OFF) {  in pwm_bbled_xec_pm_action()
306 			data->config = regs->config;  in pwm_bbled_xec_pm_action()
308 			regs->config &= ~(XEC_PWM_BBLED_CFG_MODE_MSK);  in pwm_bbled_xec_pm_action()
311 		ret = pinctrl_apply_state(devcfg->pcfg, PINCTRL_STATE_SLEEP);  in pwm_bbled_xec_pm_action()
312 		/* pinctrl-1 does not exist. */  in pwm_bbled_xec_pm_action()
313 		if (ret == -ENOENT) {  in pwm_bbled_xec_pm_action()
318 	ret = -ENOTSUP;  in pwm_bbled_xec_pm_action()
331 	const struct pwm_bbled_xec_config * const cfg = dev->config;  in pwm_bbled_xec_init()
332 	struct bbled_regs * const regs = cfg->regs;  in pwm_bbled_xec_init()
333 	int ret = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);  in pwm_bbled_xec_init()
336 		LOG_ERR("XEC PWM-BBLED pinctrl init failed (%d)", ret);  in pwm_bbled_xec_init()
341 	regs->config = BIT(XEC_PWM_BBLED_CFG_RST_PWM_POS);  in pwm_bbled_xec_init()
342 	regs->config = 0U;  in pwm_bbled_xec_init()
343 	if (cfg->clk_sel == XEC_PWM_BBLED_CLKSEL_AHB_48M) {  in pwm_bbled_xec_init()
344 		regs->config |= BIT(XEC_PWM_BBLED_CFG_CLK_SRC_48M_POS);  in pwm_bbled_xec_init()