Lines Matching +full:8 +full:- +full:12

4  * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
19 { RCAR_GP_PIN(0, 3), 12, 3 }, /* HTX0 */
20 { RCAR_GP_PIN(0, 2), 8, 3 }, /* HRX0 */
29 { RCAR_GP_PIN(0, 12), 16, 3 }, /* MSIOF0_RXD */
30 { RCAR_GP_PIN(0, 11), 12, 3 }, /* MSIOF0_SYNC */
31 { RCAR_GP_PIN(0, 10), 8, 3 }, /* CTS0_N */
33 { RCAR_GP_PIN(0, 8), 0, 3 }, /* SCK0 */
38 { RCAR_GP_PIN(0, 19), 12, 3 }, /* IRQ2 */
39 { RCAR_GP_PIN(0, 18), 8, 3 }, /* IRQ1 */
50 { RCAR_GP_PIN(1, 3), 12, 3 }, /* GP1_03 */
51 { RCAR_GP_PIN(1, 2), 8, 3 }, /* GP1_02 */
60 { RCAR_GP_PIN(1, 12), 16, 3 }, /* MMC_SD_CLK */
61 { RCAR_GP_PIN(1, 11), 12, 3 }, /* GP1_11 */
62 { RCAR_GP_PIN(1, 10), 8, 3 }, /* GP1_10 */
64 { RCAR_GP_PIN(1, 8), 0, 3 }, /* GP1_08 */
72 { RCAR_GP_PIN(1, 19), 12, 3 }, /* MMC_D6 */
73 { RCAR_GP_PIN(1, 18), 8, 3 }, /* MMC_D4 */
87 { RCAR_GP_PIN(2, 3), 12, 2 }, /* QSPI1_SSL */
88 { RCAR_GP_PIN(2, 2), 8, 2 }, /* RPC_RESET_N */
97 { RCAR_GP_PIN(2, 12), 16, 2 }, /* QSPI0_MISO_IO1 */
98 { RCAR_GP_PIN(2, 11), 12, 2 }, /* QSPI0_IO2 */
99 { RCAR_GP_PIN(2, 10), 8, 2 }, /* QSPI0_SPCLK */
101 { RCAR_GP_PIN(2, 8), 0, 2 }, /* QSPI1_SPCLK */
114 { RCAR_GP_PIN(3, 3), 12, 3 }, /* TSN2_MDC_B */
115 { RCAR_GP_PIN(3, 2), 8, 3 }, /* TSN0_MDIO_B */
124 { RCAR_GP_PIN(3, 12), 16, 3 }, /* TSN0_MAGIC_B */
125 { RCAR_GP_PIN(3, 11), 12, 3 }, /* TSN1_PHY_INT_B */
126 { RCAR_GP_PIN(3, 10), 8, 3 }, /* TSN0_PHY_INT_B */
128 { RCAR_GP_PIN(3, 8), 0, 3 }, /* TSN0_LINK_B */
132 { RCAR_GP_PIN(3, 18), 8, 3 }, /* TSN0_AVTP_CAPTURE_B */
143 { RCAR_GP_PIN(4, 3), 12, 3 }, /* GP4_03 */
144 { RCAR_GP_PIN(4, 2), 8, 3 }, /* GP4_02 */
153 { RCAR_GP_PIN(4, 12), 16, 3 }, /* GP4_12 */
154 { RCAR_GP_PIN(4, 11), 12, 3 }, /* GP4_11 */
155 { RCAR_GP_PIN(4, 10), 8, 3 }, /* GP4_10 */
157 { RCAR_GP_PIN(4, 8), 0, 3 }, /* GP4_08 */
165 { RCAR_GP_PIN(4, 19), 12, 3 }, /* GP4_19 */
166 { RCAR_GP_PIN(4, 18), 8, 3 }, /* GP4_18 */
175 { RCAR_GP_PIN(4, 27), 12, 3 }, /* MSPI1CSS0 */
176 { RCAR_GP_PIN(4, 26), 8, 3 }, /* MPSI1SO/MSPI1DCS */
186 { RCAR_GP_PIN(5, 3), 12, 3 }, /* ETNB0WOL */
187 { RCAR_GP_PIN(5, 2), 8, 3 }, /* ETNB0MD */
196 { RCAR_GP_PIN(5, 12), 16, 3 }, /* ETNB0RXCLK */
197 { RCAR_GP_PIN(5, 11), 12, 3 }, /* ETNB0RXD0 */
198 { RCAR_GP_PIN(5, 10), 8, 3 }, /* ETNB0RXDV */
200 { RCAR_GP_PIN(5, 8), 0, 3 }, /* ETNB0RXD1 */
204 { RCAR_GP_PIN(5, 19), 12, 3 }, /* ETNB0TXD0 */
205 { RCAR_GP_PIN(5, 18), 8, 3 }, /* ETNB0TXEN */
216 { RCAR_GP_PIN(6, 3), 12, 3 }, /* RLIN36RX/INTP22 */
217 { RCAR_GP_PIN(6, 2), 8, 3 }, /* RLIN36TX */
226 { RCAR_GP_PIN(6, 12), 16, 3 }, /* RLIN31TX */
227 { RCAR_GP_PIN(6, 11), 12, 3 }, /* RLIN32RX/INTP18 */
228 { RCAR_GP_PIN(6, 10), 8, 3 }, /* RLIN32TX */
230 { RCAR_GP_PIN(6, 8), 0, 3 }, /* RLIN33TX */
237 { RCAR_GP_PIN(6, 19), 12, 3 }, /* INTP34 */
238 { RCAR_GP_PIN(6, 18), 8, 3 }, /* INTP35 */
252 { RCAR_GP_PIN(7, 3), 12, 3 }, /* CAN1RX/INTP1 */
253 { RCAR_GP_PIN(7, 2), 8, 3 }, /* CAN1TX */
262 { RCAR_GP_PIN(7, 12), 16, 3 }, /* CAN6TX */
263 { RCAR_GP_PIN(7, 11), 12, 3 }, /* CAN5RX/INTP5 */
264 { RCAR_GP_PIN(7, 10), 8, 3 }, /* CAN5TX */
266 { RCAR_GP_PIN(7, 8), 0, 3 }, /* CAN4TX */
274 { RCAR_GP_PIN(7, 19), 12, 3 }, /* CAN9RX/INTP9 */
275 { RCAR_GP_PIN(7, 18), 8, 3 }, /* CAN9TX */
285 { RCAR_GP_PIN(7, 27), 12, 3 }, /* CAN13RX/INTP13 */
286 { RCAR_GP_PIN(7, 26), 8, 3 }, /* CAN13TX */
292 { RCAR_GP_PIN(8, 0), 0, 3 }, /* PRESETOUT0# */
296 { RCAR_GP_PIN(8, 12), 16, 2 }, /* DCUTCK0 */
297 { RCAR_GP_PIN(8, 11), 12, 2 }, /* DCUTDO0 */
298 { RCAR_GP_PIN(8, 10), 8, 2 }, /* DCUTDI0 */
299 { RCAR_GP_PIN(8, 9), 4, 2 }, /* DCUTDY0# */
300 { RCAR_GP_PIN(8, 8), 0, 2 }, /* DCUTMS0 */
320 [8] = RCAR_GP_PIN(0, 8), /* SCK0 */
324 [12] = RCAR_GP_PIN(0, 12), /* MSIOF0_RXD */
354 [8] = RCAR_GP_PIN(1, 8), /* GP1_08 */
358 [12] = RCAR_GP_PIN(1, 12), /* MMC_SD_CLK */
388 [8] = RCAR_GP_PIN(2, 8), /* QSPI1_SPCLK */
392 [12] = RCAR_GP_PIN(2, 12), /* QSPI0_MISO_IO1 */
422 [8] = RCAR_GP_PIN(3, 8), /* TSN0_LINK_B */
426 [12] = RCAR_GP_PIN(3, 12), /* TSN0_MAGIC_B */
456 [8] = RCAR_GP_PIN(4, 8), /* GP4_08 */
460 [12] = RCAR_GP_PIN(4, 12), /* GP4_12 */
490 [8] = RCAR_GP_PIN(5, 8), /* ETNB0RXD1 */
494 [12] = RCAR_GP_PIN(5, 12), /* ETNB0RXCLK */
524 [8] = RCAR_GP_PIN(6, 8), /* RLIN33TX */
528 [12] = RCAR_GP_PIN(6, 12), /* RLIN31TX */
558 [8] = RCAR_GP_PIN(7, 8), /* CAN4TX */
562 [12] = RCAR_GP_PIN(7, 12), /* CAN6TX */
599 return -EINVAL; in pfc_rcar_get_reg_index()