Lines Matching +full:24 +full:- +full:28
4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
15 { RCAR_GP_PIN(0, 7), 28, 3 }, /* TX0 */
16 { RCAR_GP_PIN(0, 6), 24, 3 }, /* RX0 */
26 { RCAR_GP_PIN(0, 15), 28, 3 }, /* MSIOF0_SS1 */
27 { RCAR_GP_PIN(0, 14), 24, 3 }, /* MSIOF0_SCK */
46 { RCAR_GP_PIN(1, 7), 28, 3 }, /* GP1_07 */
47 { RCAR_GP_PIN(1, 6), 24, 3 }, /* GP1_06 */
57 { RCAR_GP_PIN(1, 15), 28, 3 }, /* MMC_SD_D2 */
58 { RCAR_GP_PIN(1, 14), 24, 3 }, /* MMC_SD_D1 */
68 { RCAR_GP_PIN(1, 23), 28, 3 }, /* SD_CD */
69 { RCAR_GP_PIN(1, 22), 24, 3 }, /* MMC_SD_CMD */
79 { RCAR_GP_PIN(1, 24), 0, 3 }, /* SD_WP */
83 { RCAR_GP_PIN(2, 7), 28, 2 }, /* QSPI1_MOSI_IO0 */
84 { RCAR_GP_PIN(2, 6), 24, 2 }, /* QSPI1_IO2 */
94 { RCAR_GP_PIN(2, 15), 28, 3 }, /* PCIE0_CLKREQ_N */
95 { RCAR_GP_PIN(2, 14), 24, 2 }, /* QSPI0_IO3 */
110 { RCAR_GP_PIN(3, 7), 28, 3 }, /* TSN2_LINK_B */
111 { RCAR_GP_PIN(3, 6), 24, 3 }, /* TSN1_LINK_B */
121 { RCAR_GP_PIN(3, 15), 28, 3 }, /* TSN1_AVTP_CAPTURE_B */
122 { RCAR_GP_PIN(3, 14), 24, 3 }, /* TSN1_AVTP_MATCH_B */
139 { RCAR_GP_PIN(4, 7), 28, 3 }, /* GP4_07 */
140 { RCAR_GP_PIN(4, 6), 24, 3 }, /* GP4_06 */
150 { RCAR_GP_PIN(4, 15), 28, 3 }, /* GP4_15 */
151 { RCAR_GP_PIN(4, 14), 24, 3 }, /* GP4_14 */
161 { RCAR_GP_PIN(4, 23), 28, 3 }, /* MSPI0CSS1 */
162 { RCAR_GP_PIN(4, 22), 24, 3 }, /* MPSI0SO/MSPI0DCS */
172 { RCAR_GP_PIN(4, 30), 24, 3 }, /* MSPI1CSS1 */
174 { RCAR_GP_PIN(4, 28), 16, 3 }, /* MSPI1SC */
178 { RCAR_GP_PIN(4, 24), 0, 3 }, /* MSPI0CSS0 */
182 { RCAR_GP_PIN(5, 7), 28, 3 }, /* ETNB0RXD3 */
183 { RCAR_GP_PIN(5, 6), 24, 3 }, /* ETNB0RXER */
193 { RCAR_GP_PIN(5, 15), 28, 3 }, /* ETNB0TXCLK */
194 { RCAR_GP_PIN(5, 14), 24, 3 }, /* ETNB0TXD3 */
212 { RCAR_GP_PIN(6, 7), 28, 3 }, /* RLIN34RX/INTP20 */
213 { RCAR_GP_PIN(6, 6), 24, 3 }, /* RLIN34TX */
223 { RCAR_GP_PIN(6, 15), 28, 3 }, /* RLIN30RX/INTP16 */
224 { RCAR_GP_PIN(6, 14), 24, 3 }, /* RLIN30TX */
234 { RCAR_GP_PIN(6, 22), 24, 3 }, /* NMI1 */
244 { RCAR_GP_PIN(6, 31), 28, 3 }, /* PRESETOUT1# */
248 { RCAR_GP_PIN(7, 7), 28, 3 }, /* CAN3RX/INTP3 */
249 { RCAR_GP_PIN(7, 6), 24, 3 }, /* CAN3TX */
259 { RCAR_GP_PIN(7, 15), 28, 3 }, /* CAN7RX/INTP7 */
260 { RCAR_GP_PIN(7, 14), 24, 3 }, /* CAN7TX */
270 { RCAR_GP_PIN(7, 23), 28, 3 }, /* CAN11RX/INTP11 */
271 { RCAR_GP_PIN(7, 22), 24, 3 }, /* CAN11TX */
281 { RCAR_GP_PIN(7, 31), 28, 3 }, /* CAN15RX/INTP15 */
282 { RCAR_GP_PIN(7, 30), 24, 3 }, /* CAN15TX */
284 { RCAR_GP_PIN(7, 28), 16, 3 }, /* CAN14TX */
288 { RCAR_GP_PIN(7, 24), 0, 3 }, /* CAN12TX */
336 [24] = PIN_NONE,
340 [28] = PIN_NONE,
370 [24] = RCAR_GP_PIN(1, 24), /* SD_WP */
374 [28] = PIN_NONE,
404 [24] = PIN_NONE,
408 [28] = PIN_NONE,
438 [24] = PIN_NONE,
442 [28] = PIN_NONE,
472 [24] = RCAR_GP_PIN(4, 24), /* MSPI0CSS0 */
476 [28] = RCAR_GP_PIN(4, 28), /* MSPI1SC */
506 [24] = PIN_NONE,
510 [28] = PIN_NONE,
540 [24] = PIN_NONE,
544 [28] = PIN_NONE,
574 [24] = RCAR_GP_PIN(7, 24), /* CAN12TX */
578 [28] = RCAR_GP_PIN(7, 28), /* CAN14TX */
599 return -EINVAL; in pfc_rcar_get_reg_index()