Lines Matching +full:16 +full:- +full:17
4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-r8a779f0.h>
18 { RCAR_GP_PIN(0, 4), 16, 3 }, /* HCTS0_N */
29 { RCAR_GP_PIN(0, 12), 16, 3 }, /* MSIOF0_RXD */
37 { RCAR_GP_PIN(0, 20), 16, 3 }, /* IRQ3 */
40 { RCAR_GP_PIN(0, 17), 4, 3 }, /* IRQ0 */
41 { RCAR_GP_PIN(0, 16), 0, 3 }, /* MSIOF0_SS2 */
49 { RCAR_GP_PIN(1, 4), 16, 3 }, /* GP1_04 */
60 { RCAR_GP_PIN(1, 12), 16, 3 }, /* MMC_SD_CLK */
71 { RCAR_GP_PIN(1, 20), 16, 3 }, /* MMC_DS */
74 { RCAR_GP_PIN(1, 17), 4, 3 }, /* MMC_D5 */
75 { RCAR_GP_PIN(1, 16), 0, 3 }, /* MMC_SD_D3 */
86 { RCAR_GP_PIN(2, 4), 16, 2 }, /* QSPI1_IO3 */
97 { RCAR_GP_PIN(2, 12), 16, 2 }, /* QSPI0_MISO_IO1 */
105 { RCAR_GP_PIN(2, 16), 0, 3 }, /* PCIE1_CLKREQ_N */
113 { RCAR_GP_PIN(3, 4), 16, 3 }, /* TSN0_MDC_B */
124 { RCAR_GP_PIN(3, 12), 16, 3 }, /* TSN0_MAGIC_B */
133 { RCAR_GP_PIN(3, 17), 4, 3 }, /* TSN0_AVTP_MATCH_B */
134 { RCAR_GP_PIN(3, 16), 0, 3 }, /* TSN0_AVTP_PPS */
142 { RCAR_GP_PIN(4, 4), 16, 3 }, /* GP4_04 */
153 { RCAR_GP_PIN(4, 12), 16, 3 }, /* GP4_12 */
164 { RCAR_GP_PIN(4, 20), 16, 3 }, /* MSPI0SC */
167 { RCAR_GP_PIN(4, 17), 4, 3 }, /* GP4_17 */
168 { RCAR_GP_PIN(4, 16), 0, 3 }, /* GP4_16 */
174 { RCAR_GP_PIN(4, 28), 16, 3 }, /* MSPI1SC */
185 { RCAR_GP_PIN(5, 4), 16, 3 }, /* ETNB0LINKSTA */
196 { RCAR_GP_PIN(5, 12), 16, 3 }, /* ETNB0RXCLK */
206 { RCAR_GP_PIN(5, 17), 4, 3 }, /* ETNB0TXD2 */
207 { RCAR_GP_PIN(5, 16), 0, 3 }, /* ETNB0TXD1 */
215 { RCAR_GP_PIN(6, 4), 16, 3 }, /* RLIN35TX */
226 { RCAR_GP_PIN(6, 12), 16, 3 }, /* RLIN31TX */
236 { RCAR_GP_PIN(6, 20), 16, 3 }, /* INTP33 */
239 { RCAR_GP_PIN(6, 17), 4, 3 }, /* INTP36 */
240 { RCAR_GP_PIN(6, 16), 0, 3 }, /* INTP37 */
251 { RCAR_GP_PIN(7, 4), 16, 3 }, /* CAN2TX */
262 { RCAR_GP_PIN(7, 12), 16, 3 }, /* CAN6TX */
273 { RCAR_GP_PIN(7, 20), 16, 3 }, /* CAN10TX */
276 { RCAR_GP_PIN(7, 17), 4, 3 }, /* CAN8RX/INTP8 */
277 { RCAR_GP_PIN(7, 16), 0, 3 }, /* CAN8TX */
284 { RCAR_GP_PIN(7, 28), 16, 3 }, /* CAN14TX */
296 { RCAR_GP_PIN(8, 12), 16, 2 }, /* DCUTCK0 */
328 [16] = RCAR_GP_PIN(0, 16), /* MSIOF0_SS2 */
329 [17] = RCAR_GP_PIN(0, 17), /* IRQ0 */
362 [16] = RCAR_GP_PIN(1, 16), /* MMC_SD_D3 */
363 [17] = RCAR_GP_PIN(1, 17), /* MMC_D5 */
396 [16] = RCAR_GP_PIN(2, 16), /* PCIE1_CLKREQ_N */
397 [17] = PIN_NONE,
430 [16] = RCAR_GP_PIN(3, 16), /* TSN0_AVTP_PPS */
431 [17] = RCAR_GP_PIN(3, 17), /* TSN0_AVTP_MATCH_B */
464 [16] = RCAR_GP_PIN(4, 16), /* GP4_16 */
465 [17] = RCAR_GP_PIN(4, 17), /* GP4_17 */
498 [16] = RCAR_GP_PIN(5, 16), /* ETNB0TXD1 */
499 [17] = RCAR_GP_PIN(5, 17), /* ETNB0TXD2 */
532 [16] = RCAR_GP_PIN(6, 16), /* INTP37 */
533 [17] = RCAR_GP_PIN(6, 17), /* INTP36 */
566 [16] = RCAR_GP_PIN(7, 16), /* CAN8TX */
567 [17] = RCAR_GP_PIN(7, 17), /* CAN8RX/INTP8 */
599 return -EINVAL; in pfc_rcar_get_reg_index()