4  * SPDX-License-Identifier: Apache-2.0
23 #define DEV_CFG(_dev) ((const struct mcux_igpio_config *)(_dev)->config)
24 #define DEV_DATA(_dev) ((struct mcux_igpio_data *)(_dev)->data)
52 				gpio_pin_t pin, gpio_flags_t flags)  in mcux_igpio_configure()  argument
54 	const struct mcux_igpio_config *config = dev->config;  in mcux_igpio_configure()
58 	int cfg_idx = pin, i;  in mcux_igpio_configure()
60 	/* Make sure pin is supported */  in mcux_igpio_configure()
61 	if ((config->common.port_pin_mask & BIT(pin)) == 0) {  in mcux_igpio_configure()
62 		return -ENOTSUP;  in mcux_igpio_configure()
65 	/* Some SOCs have non-contiguous gpio pin layouts, account for this */  in mcux_igpio_configure()
66 	for (i = 0; i < pin; i++) {  in mcux_igpio_configure()
67 		if ((config->common.port_pin_mask & BIT(i)) == 0) {  in mcux_igpio_configure()
68 			cfg_idx--;  in mcux_igpio_configure()
72 	/* Init pin configuration struct, and use pinctrl api to apply settings */  in mcux_igpio_configure()
73 	if (cfg_idx >= config->mux_count) {  in mcux_igpio_configure()
74 		/* Pin is not connected to a mux */  in mcux_igpio_configure()
75 		return -ENOTSUP;  in mcux_igpio_configure()
78 	/* Set appropriate bits in pin configuration register */  in mcux_igpio_configure()
80 		(volatile uint32_t *)(uintptr_t)config->pin_muxes[cfg_idx].config_register;  in mcux_igpio_configure()
100 		/* Set pin to keeper */  in mcux_igpio_configure()
104 	if (config->pin_muxes[pin].pue_mux) {  in mcux_igpio_configure()
121 			/* Set pin to highz */  in mcux_igpio_configure()
125 		/* PDRV/SNVS/LPSR type register layout */  in mcux_igpio_configure()
134 			/* Set pin to no pull */  in mcux_igpio_configure()
137 		/* PDRV/SNVS/LPSR reg have different ODE bits */  in mcux_igpio_configure()
138 		if (config->pin_muxes[cfg_idx].pdrv_mux) {  in mcux_igpio_configure()
145 		} else if (config->pin_muxes[cfg_idx].lpsr_mux) {  in mcux_igpio_configure()
152 		} else if (config->pin_muxes[cfg_idx].snvs_mux) {  in mcux_igpio_configure()
174 		return -ENOTSUP;  in mcux_igpio_configure()
192 		/* Set pin to highz */  in mcux_igpio_configure()
197 	memcpy(&pin_cfg.pinmux, &config->pin_muxes[cfg_idx], sizeof(pin_cfg.pinmux));  in mcux_igpio_configure()
203 		return -ENOTSUP;  in mcux_igpio_configure()
207 		GPIO_WritePinOutput(base, pin, 1);  in mcux_igpio_configure()
211 		GPIO_WritePinOutput(base, pin, 0);  in mcux_igpio_configure()
214 	WRITE_BIT(base->GDIR, pin, flags & GPIO_OUTPUT);  in mcux_igpio_configure()
223 	*value = base->DR;  in mcux_igpio_port_get_raw()
234 	base->DR = (base->DR & ~mask) | (mask & value);  in mcux_igpio_port_set_masked_raw()
270 					      gpio_pin_t pin,  in mcux_igpio_pin_interrupt_configure()  argument
274 	const struct mcux_igpio_config *config = dev->config;  in mcux_igpio_pin_interrupt_configure()
280 	/* Make sure pin is supported */  in mcux_igpio_pin_interrupt_configure()
281 	if ((config->common.port_pin_mask & BIT(pin)) == 0) {  in mcux_igpio_pin_interrupt_configure()
282 		return -ENOTSUP;  in mcux_igpio_pin_interrupt_configure()
288 		WRITE_BIT(base->IMR, pin, 0);  in mcux_igpio_pin_interrupt_configure()
307 	if (pin < 16) {  in mcux_igpio_pin_interrupt_configure()
308 		shift = 2 * pin;  in mcux_igpio_pin_interrupt_configure()
309 		base->ICR1 = (base->ICR1 & ~(3 << shift)) | (icr << shift);  in mcux_igpio_pin_interrupt_configure()
310 	} else if (pin < 32) {  in mcux_igpio_pin_interrupt_configure()
311 		shift = 2 * (pin - 16);  in mcux_igpio_pin_interrupt_configure()
312 		base->ICR2 = (base->ICR2 & ~(3 << shift)) | (icr << shift);  in mcux_igpio_pin_interrupt_configure()
314 		return -EINVAL;  in mcux_igpio_pin_interrupt_configure()
319 	WRITE_BIT(base->EDGE_SEL, pin, trig == GPIO_INT_TRIG_BOTH);  in mcux_igpio_pin_interrupt_configure()
320 	WRITE_BIT(base->ISR, pin, 1);  in mcux_igpio_pin_interrupt_configure()
321 	WRITE_BIT(base->IMR, pin, 1);  in mcux_igpio_pin_interrupt_configure()
332 	struct mcux_igpio_data *data = dev->data;  in mcux_igpio_manage_callback()
334 	return gpio_manage_callback(&data->callbacks, callback, set);  in mcux_igpio_manage_callback()
339 	struct mcux_igpio_data *data = dev->data;  in mcux_igpio_port_isr()
343 	int_flags = base->ISR;  in mcux_igpio_port_isr()
344 	base->ISR = int_flags;  in mcux_igpio_port_isr()
346 	gpio_fire_callbacks(&data->callbacks, dev, int_flags);  in mcux_igpio_port_isr()