Lines Matching +full:0 +full:xb

12 #define MAX14906_DISABLE 0
18 #define MAX14916_SETOUT_REG      0x0
19 #define MAX14916_SET_FLED_REG    0x1
20 #define MAX14916_SET_SLED_REG    0x2
21 #define MAX14916_INT_REG         0x3
22 #define MAX14916_OVR_LD_REG      0x4
23 #define MAX14916_CURR_LIM_REG    0x5
24 #define MAX14916_OW_OFF_FLT_REG  0x6
25 #define MAX14916_OW_ON_FLT_REG   0x7
26 #define MAX14916_SHT_VDD_FLT_REG 0x8
27 #define MAX14916_GLOB_ERR_REG    0x9
28 #define MAX14916_OW_OFF_EN_REG   0xA
29 #define MAX14916_OW_ON_EN_REG    0xB
30 #define MAX14916_SHT_VDD_EN_REG  0xC
31 #define MAX14916_CONFIG1_REG     0xD
32 #define MAX14916_CONFIG2_REG     0xE
33 #define MAX14916_CONFIG_MASK     0xF
37 #define MAX149x6_RW_MASK        BIT(0)
45 #define MAX14906_DO_MASK(x)     (GENMASK(1, 0) << (2 * (x)))
49 #define MAX14906_CL_MASK(x)     (GENMASK(1, 0) << (2 * (x)))
53 #define MAX14906_FLED_MASK BIT(0)
59 	MAX14906_ADDR_0, /* A0=0, A1=0 */
60 	MAX14906_ADDR_1, /* A0=1, A1=0 */
61 	MAX14906_ADDR_2, /* A0=0, A1=1 */