4  * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/dt-bindings/gpio/ite-it8xxx2-gpio.h>
19 #include <zephyr/dt-bindings/interrupt-controller/ite-intc.h>
80 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_configure()
81 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_configure()
82 	volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr;  in gpio_ite_configure()
83 	volatile uint8_t *reg_p18scr = (uint8_t *)gpio_config->reg_p18scr;  in gpio_ite_configure()
84 	volatile uint8_t *reg_gpcr = (uint8_t *)gpio_config->reg_gpcr + pin;  in gpio_ite_configure()
85 	struct gpio_ite_data *data = dev->data;  in gpio_ite_configure()
92 		return -ENOTSUP;  in gpio_ite_configure()
95 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_configure()
99 		 * Since not all GPIOs can be to configured as tri-state,  in gpio_ite_configure()
103 			/* Go back to default setting (input) */  in gpio_ite_configure()
105 			LOG_ERR("Cannot config the node-gpio@%x, pin=%d as tri-state",  in gpio_ite_configure()
107 			rc = -ENOTSUP;  in gpio_ite_configure()
129 	if (gpio_config->has_volt_sel[pin]) {  in gpio_ite_configure()
136 			data->volt_default_set &= ~mask;  in gpio_ite_configure()
141 			 * 3.3V and default so that the flag can be distinguished  in gpio_ite_configure()
144 			data->volt_default_set &= ~mask;  in gpio_ite_configure()
147 			data->volt_default_set |= mask;  in gpio_ite_configure()
149 			rc = -EINVAL;  in gpio_ite_configure()
164 	if (gpio_config->kbs_ctrl) {  in gpio_ite_configure()
187 	if (gpio_config->kbs_ctrl) {  in gpio_ite_configure()
218 	k_spin_unlock(&data->lock, key);  in gpio_ite_configure()
227 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_get_config()
228 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_get_config()
229 	volatile uint8_t *reg_gpotr = (uint8_t *)gpio_config->reg_gpotr;  in gpio_ite_get_config()
230 	volatile uint8_t *reg_p18scr = (uint8_t *)gpio_config->reg_p18scr;  in gpio_ite_get_config()
231 	volatile uint8_t *reg_gpcr = (uint8_t *)gpio_config->reg_gpcr + pin;  in gpio_ite_get_config()
232 	struct gpio_ite_data *data = dev->data;  in gpio_ite_get_config()
236 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_get_config()
237 	/* push-pull or open-drain */  in gpio_ite_get_config()
243 	if (gpio_config->has_volt_sel[pin]) {  in gpio_ite_get_config()
244 		if (data->volt_default_set & mask) {  in gpio_ite_get_config()
281 	k_spin_unlock(&data->lock, key);  in gpio_ite_get_config()
290 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_port_get_raw()
291 	volatile uint8_t *reg_gpdmr = (uint8_t *)gpio_config->reg_gpdmr;  in gpio_ite_port_get_raw()
303 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_port_set_masked_raw()
304 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_set_masked_raw()
306 	struct gpio_ite_data *data = dev->data;  in gpio_ite_port_set_masked_raw()
307 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_port_set_masked_raw()
311 	k_spin_unlock(&data->lock, key);  in gpio_ite_port_set_masked_raw()
319 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_port_set_bits_raw()
320 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_set_bits_raw()
321 	struct gpio_ite_data *data = dev->data;  in gpio_ite_port_set_bits_raw()
323 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_port_set_bits_raw()
326 	k_spin_unlock(&data->lock, key);  in gpio_ite_port_set_bits_raw()
334 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_port_clear_bits_raw()
335 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_clear_bits_raw()
336 	struct gpio_ite_data *data = dev->data;  in gpio_ite_port_clear_bits_raw()
338 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_port_clear_bits_raw()
341 	k_spin_unlock(&data->lock, key);  in gpio_ite_port_clear_bits_raw()
349 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_port_toggle_bits()
350 	volatile uint8_t *reg_gpdr = (uint8_t *)gpio_config->reg_gpdr;  in gpio_ite_port_toggle_bits()
351 	struct gpio_ite_data *data = dev->data;  in gpio_ite_port_toggle_bits()
353 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_port_toggle_bits()
356 	k_spin_unlock(&data->lock, key);  in gpio_ite_port_toggle_bits()
365 	struct gpio_ite_data *data = dev->data;  in gpio_ite_manage_callback()
367 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_manage_callback()
368 	int rc = gpio_manage_callback(&data->callbacks, callback, set);  in gpio_ite_manage_callback()
370 	k_spin_unlock(&data->lock, key);  in gpio_ite_manage_callback()
377 	const struct gpio_ite_cfg *gpio_config = dev->config;  in gpio_ite_isr()
378 	struct gpio_ite_data *data = dev->data;  in gpio_ite_isr()
380 	uint8_t num_pins = gpio_config->num_pins;  in gpio_ite_isr()
384 		if (irq == gpio_config->gpio_irq[pin]) {  in gpio_ite_isr()
386 				(uint8_t *)gpio_config->wuc_base[pin];  in gpio_ite_isr()
388 			uint8_t wuc_mask = gpio_config->wuc_mask[pin];  in gpio_ite_isr()
396 			gpio_fire_callbacks(&data->callbacks, dev, BIT(pin));  in gpio_ite_isr()
402 	k_work_submit(&data->interrupt_worker);  in gpio_ite_isr()
412 	gpio_ite_port_get_raw(data->instance, &value);  in gpio_ite_interrupt_worker()
414 	k_spinlock_key_t key = k_spin_lock(&data->lock);  in gpio_ite_interrupt_worker()
416 	triggered_int = (value & data->level_isr_high) | (~value & data->level_isr_low);  in gpio_ite_interrupt_worker()
417 	k_spin_unlock(&data->lock, key);  in gpio_ite_interrupt_worker()
420 		gpio_fire_callbacks(&data->callbacks, data->instance,  in gpio_ite_interrupt_worker()
423 		k_work_submit(&data->interrupt_worker);  in gpio_ite_interrupt_worker()
432 	const struct gpio_ite_cfg *gpio_config = dev->config;
433 	uint8_t gpio_irq = gpio_config->gpio_irq[pin];
434 	struct gpio_ite_data *data = dev->data;
456 		volatile uint8_t *reg_base = (uint8_t *)gpio_config->wuc_base[pin];
460 		uint8_t wuc_mask = gpio_config->wuc_mask[pin];
462 		k_spinlock_key_t key = k_spin_lock(&data->lock);
479 				data->level_isr_low |= BIT(pin);
480 				data->level_isr_high &= ~BIT(pin);
482 				data->level_isr_low &= ~BIT(pin);
483 				data->level_isr_high |= BIT(pin);
486 			data->level_isr_low &= ~BIT(pin);
487 			data->level_isr_high &= ~BIT(pin);
494 		k_spin_unlock(&data->lock, key);
500 	k_work_submit(&data->interrupt_worker);
521 	struct gpio_ite_data *data = dev->data;
522 	k_spinlock_key_t key = k_spin_lock(&data->lock);
524 	data->instance = dev;
525 	k_work_init(&data->interrupt_worker,
527 	k_spin_unlock(&data->lock, key);