6  * SPDX-License-Identifier: Apache-2.0
38 	if (regs->ACR & FLASH_ACR_DCEN) {  in flush_cache()
39 		regs->ACR &= ~FLASH_ACR_DCEN;  in flush_cache()
43 		regs->ACR |= FLASH_ACR_DCRST;  in flush_cache()
44 		regs->ACR &= ~FLASH_ACR_DCRST;  in flush_cache()
45 		regs->ACR |= FLASH_ACR_DCEN;  in flush_cache()
48 	if (regs->ACR & FLASH_ACR_ICEN) {  in flush_cache()
49 		regs->ACR &= ~FLASH_ACR_ICEN;  in flush_cache()
54 		regs->ACR |= FLASH_ACR_ICRST;  in flush_cache()
55 		regs->ACR &= ~FLASH_ACR_ICRST;  in flush_cache()
56 		regs->ACR |= FLASH_ACR_ICEN;  in flush_cache()
81 	if (regs->CR & FLASH_CR_LOCK) {  in write_dword()
82 		return -EIO;  in write_dword()
93 	 * It is allowed to write only zeros over an already written dword  in write_dword()
99 		return -EIO;  in write_dword()
105 	 * "Data cache might be corrupted during Flash memory read-while-write operation"  in write_dword()
107 	if (regs->ACR & FLASH_ACR_DCEN) {  in write_dword()
109 		regs->ACR &= (~FLASH_ACR_DCEN);  in write_dword()
114 	regs->CR |= FLASH_CR_PG;  in write_dword()
116 	/* Flush the register write */  in write_dword()
117 	tmp = regs->CR;  in write_dword()
119 	/* Perform the data write operation at the desired memory address */  in write_dword()
127 	regs->CR &= (~FLASH_CR_PG);  in write_dword()
132 		regs->ACR |= FLASH_ACR_DCRST;  in write_dword()
133 		regs->ACR &= (~FLASH_ACR_DCRST);  in write_dword()
134 		regs->ACR |= FLASH_ACR_DCEN;  in write_dword()
156 	if ((regs->OPTR & FLASH_OPTR_DUALBANK) ||  in erase_page()
163 		return -ENOTSUP;  in erase_page()
167 	if (regs->OPTR & FLASH_STM32_DBANK) {  in erase_page()
173 		return -ENOTSUP;  in erase_page()
178 	if (regs->CR & FLASH_CR_LOCK) {  in erase_page()
179 		return -EIO;  in erase_page()
191 	regs->CR |= FLASH_CR_PER;  in erase_page()
193 	regs->CR &= ~FLASH_CR_BKER_Msk;  in erase_page()
196 		regs->CR |= FLASH_CR_BKER;  in erase_page()
199 	regs->CR &= ~FLASH_CR_PNB_Msk;  in erase_page()
200 	regs->CR |= ((page % pages_per_bank) << 3);  in erase_page()
203 	regs->CR |= FLASH_CR_STRT;  in erase_page()
205 	/* flush the register write */  in erase_page()
206 	tmp = regs->CR;  in erase_page()
211 	regs->CR &= ~FLASH_CR_PER;  in erase_page()
223 	for (; i <= get_page(offset + len - 1) ; ++i) {  in flash_stm32_block_erase_loop()
255 	if (regs->CR & FLASH_CR_OPTLOCK) {  in flash_stm32_option_bytes_write()
256 		return -EIO;  in flash_stm32_option_bytes_write()
259 	if ((regs->OPTR & mask) == value) {  in flash_stm32_option_bytes_write()
268 	regs->OPTR = (regs->OPTR & ~mask) | value;  in flash_stm32_option_bytes_write()
269 	regs->CR |= FLASH_CR_OPTSTRT;  in flash_stm32_option_bytes_write()
271 	/* Make sure previous write is completed. */  in flash_stm32_option_bytes_write()
286 	return regs->OPTR;  in flash_stm32_option_bytes_read()
292  * Remark for future development implementing Write Protection for the L4 parts:
294  * STM32L4 allows for 2 write protected memory areas, c.f. FLASH_WEP1AR, FLASH_WRP1BR
299  * To implement Write Protection for L4 one should thus add a new EX_OP like
310 	return (regs->OPTR & FLASH_OPTR_RDP_Msk) >> FLASH_OPTR_RDP_Pos;  in flash_stm32_get_rdp_level()