4  * SPDX-License-Identifier: Apache-2.0
23 #include <zephyr/dt-bindings/flash_controller/xspi.h>
59 	struct flash_stm32_xspi_data *dev_data = dev->data;  in xspi_lock_thread()
61 	k_sem_take(&dev_data->sem, K_FOREVER);  in xspi_lock_thread()
66 	struct flash_stm32_xspi_data *dev_data = dev->data;  in xspi_unlock_thread()
68 	k_sem_give(&dev_data->sem);  in xspi_unlock_thread()
73 	struct flash_stm32_xspi_data *dev_data = dev->data;  in xspi_send_cmd()
76 	LOG_DBG("Instruction 0x%x", cmd->Instruction);  in xspi_send_cmd()
78 	dev_data->cmd_status = 0;  in xspi_send_cmd()
80 	hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);  in xspi_send_cmd()
83 		return -EIO;  in xspi_send_cmd()
85 	LOG_DBG("CCR 0x%x", dev_data->hxspi.Instance->CCR);  in xspi_send_cmd()
87 	return dev_data->cmd_status;  in xspi_send_cmd()
93 	struct flash_stm32_xspi_data *dev_data = dev->data;  in xspi_read_access()
96 	LOG_DBG("Instruction 0x%x", cmd->Instruction);  in xspi_read_access()
98 	cmd->DataLength = size;  in xspi_read_access()
100 	dev_data->cmd_status = 0;  in xspi_read_access()
102 	hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);  in xspi_read_access()
105 		return -EIO;  in xspi_read_access()
109 	hal_ret = HAL_XSPI_Receive_DMA(&dev_data->hxspi, data);  in xspi_read_access()
111 	hal_ret = HAL_XSPI_Receive_IT(&dev_data->hxspi, data);  in xspi_read_access()
116 		return -EIO;  in xspi_read_access()
119 	k_sem_take(&dev_data->sync, K_FOREVER);  in xspi_read_access()
121 	return dev_data->cmd_status;  in xspi_read_access()
127 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in xspi_write_access()
128 	struct flash_stm32_xspi_data *dev_data = dev->data;  in xspi_write_access()
131 	LOG_DBG("Instruction 0x%x", cmd->Instruction);  in xspi_write_access()
133 	cmd->DataLength = size;  in xspi_write_access()
135 	dev_data->cmd_status = 0;  in xspi_write_access()
137 	/* in OPI/STR the 3-byte AddressWidth is not supported by the NOR flash */  in xspi_write_access()
138 	if ((dev_cfg->data_mode == XSPI_OCTO_MODE) &&  in xspi_write_access()
139 		(cmd->AddressWidth != HAL_XSPI_ADDRESS_32_BITS)) {  in xspi_write_access()
141 		return -EIO;  in xspi_write_access()
144 	hal_ret = HAL_XSPI_Command(&dev_data->hxspi, cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);  in xspi_write_access()
147 		return -EIO;  in xspi_write_access()
151 	hal_ret = HAL_XSPI_Transmit_DMA(&dev_data->hxspi, (uint8_t *)data);  in xspi_write_access()
153 	hal_ret = HAL_XSPI_Transmit_IT(&dev_data->hxspi, (uint8_t *)data);  in xspi_write_access()
158 		return -EIO;  in xspi_write_access()
161 	k_sem_take(&dev_data->sync, K_FOREVER);  in xspi_write_access()
163 	return dev_data->cmd_status;  in xspi_write_access()
184 		/* AddressWidth must be set to 32bits for init and mem config phase */  in xspi_prepare_cmd()
228 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_hal_address_size()
230 	if (dev_data->address_width == 4U) {  in stm32_xspi_hal_address_size()
245 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_read_jedec_id()
257 	hal_ret = HAL_XSPI_Command(&dev_data->hxspi, &cmd,  in stm32_xspi_read_jedec_id()
262 		return -EIO;  in stm32_xspi_read_jedec_id()
266 	hal_ret = HAL_XSPI_Receive(&dev_data->hxspi, dev_data->jedec_id,  in stm32_xspi_read_jedec_id()
270 		return -EIO;  in stm32_xspi_read_jedec_id()
274 		dev_data->jedec_id[0], dev_data->jedec_id[1], dev_data->jedec_id[2]);  in stm32_xspi_read_jedec_id()
276 	dev_data->cmd_status = 0;  in stm32_xspi_read_jedec_id()
287 	struct flash_stm32_xspi_data *dev_data = dev->data;  in xspi_read_jedec_id()
290 	memcpy(id, dev_data->jedec_id, JESD216_READ_ID_LEN);  in xspi_read_jedec_id()
308 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in stm32_xspi_read_sfdp()
309 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_read_sfdp()
311 	XSPI_RegularCmdTypeDef cmd = xspi_prepare_cmd(dev_cfg->data_mode,  in stm32_xspi_read_sfdp()
312 						      dev_cfg->data_rate);  in stm32_xspi_read_sfdp()
313 	if (dev_cfg->data_mode == XSPI_OCTO_MODE) {  in stm32_xspi_read_sfdp()
330 	hal_ret = HAL_XSPI_Command(&dev_data->hxspi, &cmd, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);  in stm32_xspi_read_sfdp()
333 		return -EIO;  in stm32_xspi_read_sfdp()
336 	hal_ret = HAL_XSPI_Receive(&dev_data->hxspi, (uint8_t *)data,  in stm32_xspi_read_sfdp()
340 		return -EIO;  in stm32_xspi_read_sfdp()
343 	dev_data->cmd_status = 0;  in stm32_xspi_read_sfdp()
356 	/* Get the SFDP from the external Flash (no sfdp-bfp table in the DeviceTree) */  in xspi_read_sfdp()
362 	return -EINVAL;  in xspi_read_sfdp()
368 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in xspi_address_is_valid()
369 	size_t flash_size = dev_cfg->flash_size;  in xspi_address_is_valid()
377 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_wait_auto_polling()
379 	dev_data->cmd_status = 0;  in stm32_xspi_wait_auto_polling()
381 	if (HAL_XSPI_AutoPolling_IT(&dev_data->hxspi, s_config) != HAL_OK) {  in stm32_xspi_wait_auto_polling()
383 		return -EIO;  in stm32_xspi_wait_auto_polling()
386 	if (k_sem_take(&dev_data->sync, K_MSEC(timeout_ms)) != 0) {  in stm32_xspi_wait_auto_polling()
388 		HAL_XSPI_Abort(&dev_data->hxspi);  in stm32_xspi_wait_auto_polling()
389 		k_sem_reset(&dev_data->sync);  in stm32_xspi_wait_auto_polling()
390 		return -EIO;  in stm32_xspi_wait_auto_polling()
396 	return dev_data->cmd_status;  in stm32_xspi_wait_auto_polling()
407 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in stm32_xspi_mem_erased()
408 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_mem_erased()
409 	uint8_t nor_mode = dev_cfg->data_mode;  in stm32_xspi_mem_erased()
410 	uint8_t nor_rate = dev_cfg->data_rate;  in stm32_xspi_mem_erased()
423 		/* force 1-line InstructionMode for any non-OSPI transfer */  in stm32_xspi_mem_erased()
426 		/* force 1-line DataMode for any non-OSPI transfer */  in stm32_xspi_mem_erased()
442 	if (HAL_XSPI_Command(&dev_data->hxspi, &s_command,  in stm32_xspi_mem_erased()
445 		return -EIO;  in stm32_xspi_mem_erased()
448 	/* Start Automatic-Polling mode to wait until the memory is totally erased */  in stm32_xspi_mem_erased()
461 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_mem_ready()
474 		/* force 1-line InstructionMode for any non-OSPI transfer */  in stm32_xspi_mem_ready()
477 		/* force 1-line DataMode for any non-OSPI transfer */  in stm32_xspi_mem_ready()
492 	if (HAL_XSPI_Command(&dev_data->hxspi, &s_command,  in stm32_xspi_mem_ready()
495 		return -EIO;  in stm32_xspi_mem_ready()
498 	/* Start Automatic-Polling mode to wait until the memory is ready WIP=0 */  in stm32_xspi_mem_ready()
506 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_write_enable()
516 		/* force 1-line InstructionMode for any non-OSPI transfer */  in stm32_xspi_write_enable()
523 	if (HAL_XSPI_Command(&dev_data->hxspi, &s_command,  in stm32_xspi_write_enable()
526 		return -EIO;  in stm32_xspi_write_enable()
539 		/* force 1-line DataMode for any non-OSPI transfer */  in stm32_xspi_write_enable()
550 	if (HAL_XSPI_Command(&dev_data->hxspi, &s_command,  in stm32_xspi_write_enable()
553 		return -EIO;  in stm32_xspi_write_enable()
584 		return -EIO;  in stm32_xspi_write_cfg2reg_dummy()
590 		return -EIO;  in stm32_xspi_write_cfg2reg_dummy()
614 		return -EIO;  in stm32_xspi_write_cfg2reg_io()
620 		return -EIO;  in stm32_xspi_write_cfg2reg_io()
646 		return -EIO;  in stm32_xspi_read_cfg2reg()
651 		return -EIO;  in stm32_xspi_read_cfg2reg()
660 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in stm32_xspi_config_mem()
661 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_config_mem()
665 	if ((dev_cfg->data_mode != XSPI_OCTO_MODE)  in stm32_xspi_config_mem()
666 		&& (dev_cfg->data_rate == XSPI_STR_TRANSFER)) {  in stm32_xspi_config_mem()
677 		return -EIO;  in stm32_xspi_config_mem()
681 	if (stm32_xspi_write_cfg2reg_dummy(&dev_data->hxspi,  in stm32_xspi_config_mem()
684 		return -EIO;  in stm32_xspi_config_mem()
689 		return -EIO;  in stm32_xspi_config_mem()
694 		return -EIO;  in stm32_xspi_config_mem()
698 	uint8_t mode_enable = ((dev_cfg->data_rate == XSPI_DTR_TRANSFER)  in stm32_xspi_config_mem()
701 	if (stm32_xspi_write_cfg2reg_io(&dev_data->hxspi,  in stm32_xspi_config_mem()
704 		return -EIO;  in stm32_xspi_config_mem()
711 	dev_data->hxspi.Init.MemoryType            = HAL_XSPI_MEMTYPE_MACRONIX;  in stm32_xspi_config_mem()
712 	dev_data->hxspi.Init.DelayHoldQuarterCycle = HAL_XSPI_DHQC_ENABLE;  in stm32_xspi_config_mem()
713 	if (HAL_XSPI_Init(&dev_data->hxspi) != HAL_OK) {  in stm32_xspi_config_mem()
714 		LOG_ERR("XSPI mem type MACRONIX failed");  in stm32_xspi_config_mem()
715 		return -EIO;  in stm32_xspi_config_mem()
718 	if (dev_cfg->data_rate == XSPI_STR_TRANSFER) {  in stm32_xspi_config_mem()
723 			return -EIO;  in stm32_xspi_config_mem()
726 		if (stm32_xspi_read_cfg2reg(&dev_data->hxspi,  in stm32_xspi_config_mem()
730 			return -EIO;  in stm32_xspi_config_mem()
736 	if (dev_cfg->data_rate == XSPI_DTR_TRANSFER) {  in stm32_xspi_config_mem()
741 			return -EIO;  in stm32_xspi_config_mem()
753 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_mem_reset()
756 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in stm32_xspi_mem_reset()
759 	gpio_pin_configure_dt(&dev_cfg->reset, GPIO_OUTPUT_ACTIVE);  in stm32_xspi_mem_reset()
761 	gpio_pin_set_dt(&dev_cfg->reset, 0);  in stm32_xspi_mem_reset()
780 	if (HAL_XSPI_Command(&dev_data->hxspi,  in stm32_xspi_mem_reset()
783 		return -EIO;  in stm32_xspi_mem_reset()
788 	if (HAL_XSPI_Command(&dev_data->hxspi,  in stm32_xspi_mem_reset()
791 		return -EIO;  in stm32_xspi_mem_reset()
799 	if (HAL_XSPI_Command(&dev_data->hxspi,  in stm32_xspi_mem_reset()
802 		return -EIO;  in stm32_xspi_mem_reset()
807 	if (HAL_XSPI_Command(&dev_data->hxspi,  in stm32_xspi_mem_reset()
810 		return -EIO;  in stm32_xspi_mem_reset()
816 	if (HAL_XSPI_Command(&dev_data->hxspi,  in stm32_xspi_mem_reset()
819 		return -EIO;  in stm32_xspi_mem_reset()
824 	if (HAL_XSPI_Command(&dev_data->hxspi,  in stm32_xspi_mem_reset()
827 		return -EIO;  in stm32_xspi_mem_reset()
842 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in stm32_xspi_set_memorymap()
843 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_set_memorymap()
844 	XSPI_RegularCmdTypeDef s_command = {0}; /* Non-zero values disturb the command */  in stm32_xspi_set_memorymap()
848 	if ((dev_cfg->data_mode == XSPI_SPI_MODE) &&  in stm32_xspi_set_memorymap()
850 		/* OPI mode and 3-bytes address size not supported by memory */  in stm32_xspi_set_memorymap()
852 		return -EIO;  in stm32_xspi_set_memorymap()
857 	s_command.InstructionMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
858 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
862 	s_command.InstructionDTRMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
865 	s_command.InstructionWidth = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
866 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
870 	s_command.Instruction = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
871 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
876 					: dev_data->read_opcode)  in stm32_xspi_set_memorymap()
878 	s_command.AddressMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
879 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
883 	s_command.AddressDTRMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
886 	s_command.AddressWidth = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
889 	s_command.DataMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
890 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
894 	s_command.DataDTRMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
897 	s_command.DummyCycles = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
898 				? ((dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
902 	s_command.DQSMode = (dev_cfg->data_rate == XSPI_STR_TRANSFER)  in stm32_xspi_set_memorymap()
909 	ret = HAL_XSPI_Command(&dev_data->hxspi, &s_command, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);  in stm32_xspi_set_memorymap()
912 		return -EIO;  in stm32_xspi_set_memorymap()
915 	/* Initialize the program command */  in stm32_xspi_set_memorymap()
917 	if (dev_cfg->data_rate == XSPI_STR_TRANSFER) {  in stm32_xspi_set_memorymap()
918 		s_command.Instruction = (dev_cfg->data_mode == XSPI_SPI_MODE)  in stm32_xspi_set_memorymap()
929 	ret = HAL_XSPI_Command(&dev_data->hxspi, &s_command, HAL_XSPI_TIMEOUT_DEFAULT_VALUE);  in stm32_xspi_set_memorymap()
932 		return -EIO;  in stm32_xspi_set_memorymap()
935 	/* Enable the memory-mapping */  in stm32_xspi_set_memorymap()
938 	ret = HAL_XSPI_MemoryMapped(&dev_data->hxspi, &s_MemMappedCfg);  in stm32_xspi_set_memorymap()
941 		return -EIO;  in stm32_xspi_set_memorymap()
951 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_is_memorymap()
953 	return ((READ_BIT(dev_data->hxspi.Instance->CR,  in stm32_xspi_is_memorymap()
960 	struct flash_stm32_xspi_data *dev_data = dev->data;  in stm32_xspi_abort()
962 	if (HAL_XSPI_Abort(&dev_data->hxspi) != HAL_OK) {  in stm32_xspi_abort()
964 		return -EIO;  in stm32_xspi_abort()
980 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in flash_stm32_xspi_erase()
981 	struct flash_stm32_xspi_data *dev_data = dev->data;  in flash_stm32_xspi_erase()
990 	if (size > dev_cfg->flash_size) {  in flash_stm32_xspi_erase()
991 		size = dev_cfg->flash_size;  in flash_stm32_xspi_erase()
997 		return -EINVAL;  in flash_stm32_xspi_erase()
1000 	if (((size % SPI_NOR_SECTOR_SIZE) != 0) && (size < dev_cfg->flash_size)) {  in flash_stm32_xspi_erase()
1002 		return -ENOTSUP;  in flash_stm32_xspi_erase()
1012 			LOG_ERR("Failed to abort memory-mapped access before erase");  in flash_stm32_xspi_erase()
1028 		dev_cfg->data_mode, dev_cfg->data_rate) != 0) {  in flash_stm32_xspi_erase()
1033 	cmd_erase.InstructionMode    = (dev_cfg->data_mode == XSPI_OCTO_MODE)  in flash_stm32_xspi_erase()
1036 	cmd_erase.InstructionDTRMode = (dev_cfg->data_rate == XSPI_DTR_TRANSFER)  in flash_stm32_xspi_erase()
1039 	cmd_erase.InstructionWidth    = (dev_cfg->data_mode == XSPI_OCTO_MODE)  in flash_stm32_xspi_erase()
1046 			dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_erase()
1052 		if (size == dev_cfg->flash_size) {  in flash_stm32_xspi_erase()
1057 			cmd_erase.Instruction = (dev_cfg->data_mode == XSPI_OCTO_MODE)  in flash_stm32_xspi_erase()
1064 			size -= dev_cfg->flash_size;  in flash_stm32_xspi_erase()
1076 				(dev_cfg->data_mode == XSPI_OCTO_MODE)  in flash_stm32_xspi_erase()
1080 				(dev_cfg->data_rate == XSPI_DTR_TRANSFER)  in flash_stm32_xspi_erase()
1087 							dev_data->erase_types;  in flash_stm32_xspi_erase()
1095 				if ((etp->exp != 0)  in flash_stm32_xspi_erase()
1096 				    && SPI_NOR_IS_ALIGNED(addr, etp->exp)  in flash_stm32_xspi_erase()
1097 				    && (size >= BIT(etp->exp))  in flash_stm32_xspi_erase()
1099 					|| (etp->exp > bet->exp))) {  in flash_stm32_xspi_erase()
1101 					cmd_erase.Instruction = bet->cmd;  in flash_stm32_xspi_erase()
1104 					if (dev_cfg->data_mode == XSPI_OCTO_MODE) {  in flash_stm32_xspi_erase()
1126 				addr += BIT(bet->exp);  in flash_stm32_xspi_erase()
1127 				size -= BIT(bet->exp);  in flash_stm32_xspi_erase()
1130 				size -= SPI_NOR_SECTOR_SIZE;  in flash_stm32_xspi_erase()
1133 			ret = stm32_xspi_mem_ready(dev, dev_cfg->data_mode,  in flash_stm32_xspi_erase()
1134 						dev_cfg->data_rate);  in flash_stm32_xspi_erase()
1150 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in flash_stm32_xspi_read()
1151 	struct flash_stm32_xspi_data *dev_data = dev->data;  in flash_stm32_xspi_read()
1157 		return -EINVAL;  in flash_stm32_xspi_read()
1171 	/* Do reads through memory-mapping instead of indirect */  in flash_stm32_xspi_read()
1184 	LOG_DBG("Memory-mapped read from 0x%08lx, len %zu", mmap_addr, size);  in flash_stm32_xspi_read()
1189 	XSPI_RegularCmdTypeDef cmd = xspi_prepare_cmd(dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_read()
1191 	if (dev_cfg->data_mode != XSPI_OCTO_MODE) {  in flash_stm32_xspi_read()
1192 		switch (dev_data->read_mode) {  in flash_stm32_xspi_read()
1229 	if (dev_cfg->data_rate == XSPI_DTR_TRANSFER) {  in flash_stm32_xspi_read()
1235 		if (dev_cfg->data_mode == XSPI_OCTO_MODE) {  in flash_stm32_xspi_read()
1241 			cmd.Instruction = dev_data->read_opcode;  in flash_stm32_xspi_read()
1242 			cmd.DummyCycles = dev_data->read_dummy;  in flash_stm32_xspi_read()
1262 /* Function to write the flash (page program) : with possible OCTO/SPI and STR/DTR */
1266 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in flash_stm32_xspi_write()
1267 	struct flash_stm32_xspi_data *dev_data = dev->data;  in flash_stm32_xspi_write()
1274 		return -EINVAL;  in flash_stm32_xspi_write()
1291 			LOG_ERR("Failed to abort memory-mapped access before write");  in flash_stm32_xspi_write()
1296 	/* page program for STR or DTR mode */  in flash_stm32_xspi_write()
1297 	XSPI_RegularCmdTypeDef cmd_pp = xspi_prepare_cmd(dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_write()
1300 	cmd_pp.Instruction = dev_data->write_opcode;  in flash_stm32_xspi_write()
1302 	if (dev_cfg->data_mode != XSPI_OCTO_MODE) {  in flash_stm32_xspi_write()
1343 				   dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_write()
1352 					      dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_write()
1363 		if (((addr + to_write - 1U) / SPI_NOR_PAGE_SIZE)  in flash_stm32_xspi_write()
1365 			to_write = SPI_NOR_PAGE_SIZE -  in flash_stm32_xspi_write()
1376 		size -= to_write;  in flash_stm32_xspi_write()
1380 		/* Configure automatic polling mode to wait for end of program */  in flash_stm32_xspi_write()
1382 						 dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_write()
1411 	struct flash_stm32_xspi_data *dev_data = dev->data;  in flash_stm32_xspi_isr()
1413 	HAL_XSPI_IRQHandler(&dev_data->hxspi);  in flash_stm32_xspi_isr()
1458 	dev_data->cmd_status = -EIO;  in HAL_XSPI_ErrorCallback()
1460 	k_sem_give(&dev_data->sync);  in HAL_XSPI_ErrorCallback()
1473 	k_sem_give(&dev_data->sync);  in HAL_XSPI_CmdCpltCallback()
1486 	k_sem_give(&dev_data->sync);  in HAL_XSPI_RxCpltCallback()
1499 	k_sem_give(&dev_data->sync);  in HAL_XSPI_TxCpltCallback()
1512 	k_sem_give(&dev_data->sync);  in HAL_XSPI_StatusMatchCallback()
1525 	dev_data->cmd_status = -EIO;  in HAL_XSPI_TimeOutCallback()
1527 	k_sem_give(&dev_data->sync);  in HAL_XSPI_TimeOutCallback()
1535 	struct flash_stm32_xspi_data *dev_data = dev->data;  in flash_stm32_xspi_pages_layout()
1537 	*layout = &dev_data->layout;  in flash_stm32_xspi_pages_layout()
1559 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in setup_pages_layout()
1560 	struct flash_stm32_xspi_data *data = dev->data;  in setup_pages_layout()
1561 	const size_t flash_size = dev_cfg->flash_size;  in setup_pages_layout()
1562 	uint32_t layout_page_size = data->page_size;  in setup_pages_layout()
1567 	for (size_t i = 0; i < ARRAY_SIZE(data->erase_types); ++i) {  in setup_pages_layout()
1568 		const struct jesd216_erase_type *etp = &data->erase_types[i];  in setup_pages_layout()
1570 		if ((etp->cmd != 0)  in setup_pages_layout()
1571 		    && ((value == 0) || (etp->exp < value))) {  in setup_pages_layout()
1572 			value = etp->exp;  in setup_pages_layout()
1598 	data->layout.pages_size = layout_page_size;  in setup_pages_layout()
1599 	data->layout.pages_count = flash_size / layout_page_size;  in setup_pages_layout()
1600 	LOG_DBG("layout %u x %u By pages", data->layout.pages_count,  in setup_pages_layout()
1601 					   data->layout.pages_size);  in setup_pages_layout()
1625 		return -EINVAL;  in stm32_xspi_read_status_register()
1633 	struct flash_stm32_xspi_data *data = dev->data;  in stm32_xspi_write_status_register()
1649 		if (data->qer_type == JESD216_DW15_QER_S2B1v1) {  in stm32_xspi_write_status_register()
1662 		if ((data->qer_type == JESD216_DW15_QER_VAL_S2B1v1) ||  in stm32_xspi_write_status_register()
1663 		    (data->qer_type == JESD216_DW15_QER_VAL_S2B1v4) ||  in stm32_xspi_write_status_register()
1664 		    (data->qer_type == JESD216_DW15_QER_VAL_S2B1v5)) {  in stm32_xspi_write_status_register()
1679 		return -EINVAL;  in stm32_xspi_write_status_register()
1687 	struct flash_stm32_xspi_data *data = dev->data;  in stm32_xspi_enable_qe()
1693 	switch (data->qer_type) {  in stm32_xspi_enable_qe()
1716 		return -ENOTSUP;  in stm32_xspi_enable_qe()
1754 		ret = -EIO;  in stm32_xspi_enable_qe()
1763 	struct flash_stm32_xspi_data *data = dev->data;  in spi_nor_process_bfp_addrbytes()
1767 		data->address_width = 4U;  in spi_nor_process_bfp_addrbytes()
1769 		data->address_width = 3U;  in spi_nor_process_bfp_addrbytes()
1811 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in spi_nor_process_bfp()
1812 	struct flash_stm32_xspi_data *data = dev->data;  in spi_nor_process_bfp()
1813 	/* must be kept in data mode order, ignore 1-1-1 (always supported) */  in spi_nor_process_bfp()
1818 	struct jesd216_erase_type *etp = data->erase_types;  in spi_nor_process_bfp()
1824 	if (flash_size != dev_cfg->flash_size) {  in spi_nor_process_bfp()
1828 	LOG_DBG("%s: %u MiBy flash", dev->name, (uint32_t)(flash_size >> 20));  in spi_nor_process_bfp()
1833 	memset(data->erase_types, 0, sizeof(data->erase_types));  in spi_nor_process_bfp()
1834 	for (idx = 1U; idx <= ARRAY_SIZE(data->erase_types); ++idx) {  in spi_nor_process_bfp()
1837 					(uint32_t)BIT(etp->exp), etp->cmd);  in spi_nor_process_bfp()
1843 	LOG_DBG("Address width: %u Bytes", data->address_width);  in spi_nor_process_bfp()
1846 	if (data->write_opcode == SPI_NOR_WRITEOC_NONE) {  in spi_nor_process_bfp()
1847 		switch (dev_cfg->data_mode) {  in spi_nor_process_bfp()
1849 			data->write_opcode = SPI_NOR_OCMD_PAGE_PRG;  in spi_nor_process_bfp()
1852 			data->write_opcode = SPI_NOR_CMD_PP_1_4_4;  in spi_nor_process_bfp()
1855 			data->write_opcode = SPI_NOR_CMD_PP_1_1_2;  in spi_nor_process_bfp()
1858 			data->write_opcode = SPI_NOR_CMD_PP;  in spi_nor_process_bfp()
1863 	if (dev_cfg->data_mode != XSPI_OCTO_MODE) {  in spi_nor_process_bfp()
1865 		data->read_mode = JESD216_MODE_111;  in spi_nor_process_bfp()
1866 		data->read_opcode = SPI_NOR_CMD_READ;  in spi_nor_process_bfp()
1867 		data->read_dummy = 0U;  in spi_nor_process_bfp()
1869 		if (dev_cfg->data_mode != XSPI_SPI_MODE) {  in spi_nor_process_bfp()
1870 			if (dev_cfg->data_mode == XSPI_DUAL_MODE) {  in spi_nor_process_bfp()
1886 				data->read_mode = supported_read_modes[idx];  in spi_nor_process_bfp()
1887 				data->read_opcode = read_instr.instr;  in spi_nor_process_bfp()
1888 				data->read_dummy =  in spi_nor_process_bfp()
1893 		/* convert 3-Byte opcodes to 4-Byte (if required) */  in spi_nor_process_bfp()
1895 			if (data->address_width != 4U) {  in spi_nor_process_bfp()
1896 				LOG_DBG("4-Byte opcodes require 4-Byte address width");  in spi_nor_process_bfp()
1897 				return -ENOTSUP;  in spi_nor_process_bfp()
1899 			data->read_opcode = spi_nor_convert_read_to_4b(data->read_opcode);  in spi_nor_process_bfp()
1900 			data->write_opcode = spi_nor_convert_write_to_4b(data->write_opcode);  in spi_nor_process_bfp()
1904 		if (dev_cfg->data_mode == XSPI_QUAD_MODE) {  in spi_nor_process_bfp()
1910 				data->qer_type = dw15.qer;  in spi_nor_process_bfp()
1913 			LOG_DBG("QE requirement mode: %x", data->qer_type);  in spi_nor_process_bfp()
1917 				return -EIO;  in spi_nor_process_bfp()
1924 	data->page_size = jesd216_bfp_page_size(php, bfp);  in spi_nor_process_bfp()
1926 	LOG_DBG("Page size %u bytes", data->page_size);  in spi_nor_process_bfp()
1929 		data->read_mode, data->read_opcode, data->read_dummy);  in spi_nor_process_bfp()
1930 	LOG_DBG("Using write instr: 0x%X", data->write_opcode);  in spi_nor_process_bfp()
1948 	if (!device_is_ready(dma_stream->dev)) {  in flash_stm32_xspi_dma_init()
1949 		LOG_ERR("DMA %s device not ready", dma_stream->dev->name);  in flash_stm32_xspi_dma_init()
1950 		return -ENODEV;  in flash_stm32_xspi_dma_init()
1953 	dma_stream->cfg.user_data = hdma;  in flash_stm32_xspi_dma_init()
1955 	dma_stream->cfg.linked_channel = STM32_DMA_HAL_OVERRIDE;  in flash_stm32_xspi_dma_init()
1956 	/* Because of the STREAM OFFSET, the DMA channel given here is from 1 - 8 */  in flash_stm32_xspi_dma_init()
1957 	ret = dma_config(dma_stream->dev,  in flash_stm32_xspi_dma_init()
1958 			 (dma_stream->channel + STM32_DMA_STREAM_OFFSET), &dma_stream->cfg);  in flash_stm32_xspi_dma_init()
1961 			dma_stream->channel + STM32_DMA_STREAM_OFFSET);  in flash_stm32_xspi_dma_init()
1966 	if (dma_stream->cfg.source_data_size != dma_stream->cfg.dest_data_size) {  in flash_stm32_xspi_dma_init()
1968 		return -EINVAL;  in flash_stm32_xspi_dma_init()
1971 	hdma->Init.SrcDataWidth = DMA_SRC_DATAWIDTH_WORD; /* Fixed value */  in flash_stm32_xspi_dma_init()
1972 	hdma->Init.DestDataWidth = DMA_DEST_DATAWIDTH_WORD; /* Fixed value */  in flash_stm32_xspi_dma_init()
1973 	hdma->Init.SrcInc = (dma_stream->src_addr_increment)  in flash_stm32_xspi_dma_init()
1976 	hdma->Init.DestInc = (dma_stream->dst_addr_increment)  in flash_stm32_xspi_dma_init()
1979 	hdma->Init.SrcBurstLength = 4;  in flash_stm32_xspi_dma_init()
1980 	hdma->Init.DestBurstLength = 4;  in flash_stm32_xspi_dma_init()
1981 	hdma->Init.Priority = table_priority[dma_stream->cfg.channel_priority];  in flash_stm32_xspi_dma_init()
1982 	hdma->Init.Direction = table_direction[dma_stream->cfg.channel_direction];  in flash_stm32_xspi_dma_init()
1983 	hdma->Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0 | DMA_SRC_ALLOCATED_PORT1;  in flash_stm32_xspi_dma_init()
1984 	hdma->Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;  in flash_stm32_xspi_dma_init()
1985 	hdma->Init.Mode = DMA_NORMAL;  in flash_stm32_xspi_dma_init()
1986 	hdma->Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;  in flash_stm32_xspi_dma_init()
1987 	hdma->Init.Request = dma_stream->cfg.dma_slot;  in flash_stm32_xspi_dma_init()
1994 	hdma->Instance = LL_DMA_GET_CHANNEL_INSTANCE(dma_stream->reg,  in flash_stm32_xspi_dma_init()
1995 						    dma_stream->channel);  in flash_stm32_xspi_dma_init()
2000 		return -EIO;  in flash_stm32_xspi_dma_init()
2005 		return -EIO;  in flash_stm32_xspi_dma_init()
2016 	const struct flash_stm32_xspi_config *dev_cfg = dev->config;  in flash_stm32_xspi_init()
2017 	struct flash_stm32_xspi_data *dev_data = dev->data;  in flash_stm32_xspi_init()
2023 	if ((dev_cfg->data_mode != XSPI_OCTO_MODE)  in flash_stm32_xspi_init()
2024 		&& (dev_cfg->data_rate == XSPI_DTR_TRANSFER)) {  in flash_stm32_xspi_init()
2027 		return -ENOTSUP;  in flash_stm32_xspi_init()
2031 	ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);  in flash_stm32_xspi_init()
2039 		return -ENODEV;  in flash_stm32_xspi_init()
2047 		dev_data->hxspi.State = HAL_XSPI_STATE_BUSY_MEM_MAPPED;  in flash_stm32_xspi_init()
2052 	if (dev_cfg->pclk_len > 3) {  in flash_stm32_xspi_init()
2054 		LOG_ERR("Could not select %d XSPI domain clock", dev_cfg->pclk_len);  in flash_stm32_xspi_init()
2055 		return -EIO;  in flash_stm32_xspi_init()
2060 			     (clock_control_subsys_t) &dev_cfg->pclken[0]) != 0) {  in flash_stm32_xspi_init()
2062 		return -EIO;  in flash_stm32_xspi_init()
2065 					(clock_control_subsys_t) &dev_cfg->pclken[0],  in flash_stm32_xspi_init()
2068 		return -EIO;  in flash_stm32_xspi_init()
2071 	if (IS_ENABLED(STM32_XSPI_DOMAIN_CLOCK_SUPPORT) && (dev_cfg->pclk_len > 1)) {  in flash_stm32_xspi_init()
2073 				(clock_control_subsys_t) &dev_cfg->pclken[1],  in flash_stm32_xspi_init()
2076 			return -EIO;  in flash_stm32_xspi_init()
2080 		 * TODO: retrieve index in the clocks property where clocks has "xspi-ker"  in flash_stm32_xspi_init()
2084 				(clock_control_subsys_t) &dev_cfg->pclken[1],  in flash_stm32_xspi_init()
2087 			return -EIO;  in flash_stm32_xspi_init()
2090 	/* Clock domain corresponding to the IO-Mgr (XSPIM) */  in flash_stm32_xspi_init()
2091 	if (IS_ENABLED(STM32_XSPI_DOMAIN_CLOCK_SUPPORT) && (dev_cfg->pclk_len > 2)) {  in flash_stm32_xspi_init()
2093 				(clock_control_subsys_t) &dev_cfg->pclken[2]) != 0) {  in flash_stm32_xspi_init()
2095 			return -EIO;  in flash_stm32_xspi_init()
2103 		if (clk <= dev_cfg->max_frequency) {  in flash_stm32_xspi_init()
2111 	dev_data->hxspi.Init.ClockPrescaler = prescaler;  in flash_stm32_xspi_init()
2113 	dev_data->hxspi.Init.MemorySize = find_lsb_set(dev_cfg->flash_size) - 2;  in flash_stm32_xspi_init()
2115 	dev_data->hxspi.Init.WrapSize = HAL_XSPI_WRAP_NOT_SUPPORTED;  in flash_stm32_xspi_init()
2118 	if (dev_cfg->data_rate == XSPI_DTR_TRANSFER) {  in flash_stm32_xspi_init()
2119 		dev_data->hxspi.Init.MemoryType = HAL_XSPI_MEMTYPE_MACRONIX;  in flash_stm32_xspi_init()
2120 		dev_data->hxspi.Init.DelayHoldQuarterCycle = HAL_XSPI_DHQC_ENABLE;  in flash_stm32_xspi_init()
2125 	dev_data->hxspi.Init.DelayBlockBypass = HAL_XSPI_DELAY_BLOCK_BYPASS;  in flash_stm32_xspi_init()
2127 	dev_data->hxspi.Init.DelayBlockBypass = HAL_XSPI_DELAY_BLOCK_ON;  in flash_stm32_xspi_init()
2131 	if (HAL_XSPI_Init(&dev_data->hxspi) != HAL_OK) {  in flash_stm32_xspi_init()
2133 		return -EIO;  in flash_stm32_xspi_init()
2142 	if (dev_data->hxspi.Instance == XSPI1) {  in flash_stm32_xspi_init()
2144 	} else if (dev_data->hxspi.Instance == XSPI2) {  in flash_stm32_xspi_init()
2150 	if (HAL_XSPIM_Config(&dev_data->hxspi, &xspi_mgr_cfg,  in flash_stm32_xspi_init()
2153 		return -EIO;  in flash_stm32_xspi_init()
2162 	(void)HAL_XSPI_DLYB_GetClockPeriod(&dev_data->hxspi, &xspi_delay_block_cfg);  in flash_stm32_xspi_init()
2166 	if (HAL_XSPI_DLYB_SetConfig(&dev_data->hxspi, &xspi_delay_block_cfg) != HAL_OK) {  in flash_stm32_xspi_init()
2168 		return -EIO;  in flash_stm32_xspi_init()
2179 	if (flash_stm32_xspi_dma_init(&hdma_tx, &dev_data->dma_tx) != 0) {  in flash_stm32_xspi_init()
2181 		return -EIO;  in flash_stm32_xspi_init()
2185 	__HAL_LINKDMA(&dev_data->hxspi, hdmatx, hdma_tx);  in flash_stm32_xspi_init()
2187 	if (flash_stm32_xspi_dma_init(&hdma_rx, &dev_data->dma_rx) != 0) {  in flash_stm32_xspi_init()
2189 		return -EIO;  in flash_stm32_xspi_init()
2193 	__HAL_LINKDMA(&dev_data->hxspi, hdmarx, hdma_rx);  in flash_stm32_xspi_init()
2197 	k_sem_init(&dev_data->sem, 1, 1);  in flash_stm32_xspi_init()
2198 	k_sem_init(&dev_data->sync, 0, 1);  in flash_stm32_xspi_init()
2201 	dev_cfg->irq_config(dev);  in flash_stm32_xspi_init()
2206 		return -EIO;  in flash_stm32_xspi_init()
2209 	LOG_DBG("Reset Mem (SPI/STR)");  in flash_stm32_xspi_init()
2215 		return -EIO;  in flash_stm32_xspi_init()
2218 	LOG_DBG("Mem Ready (SPI/STR)");  in flash_stm32_xspi_init()
2231 			dev_cfg->data_mode, dev_cfg->data_rate);  in flash_stm32_xspi_init()
2232 		return -EIO;  in flash_stm32_xspi_init()
2254 		return -EINVAL;  in flash_stm32_xspi_init()
2257 	LOG_DBG("%s: SFDP v %u.%u AP %x with %u PH", dev->name,  in flash_stm32_xspi_init()
2258 		hp->rev_major, hp->rev_minor, hp->access, 1 + hp->nph);  in flash_stm32_xspi_init()
2260 	const struct jesd216_param_header *php = hp->phdr;  in flash_stm32_xspi_init()
2262 						     MIN(decl_nph, 1 + hp->nph);  in flash_stm32_xspi_init()
2268 			(php - hp->phdr), id, php->rev_major, php->rev_minor,  in flash_stm32_xspi_init()
2269 			php->len_dw, jesd216_param_addr(php));  in flash_stm32_xspi_init()
2280 					     MIN(sizeof(uint32_t) * php->len_dw, sizeof(u2.dw)));  in flash_stm32_xspi_init()
2292 			if (dev_data->address_width == 4U) {  in flash_stm32_xspi_init()
2306 					     MIN(sizeof(uint32_t) * php->len_dw, sizeof(u2.dw)));  in flash_stm32_xspi_init()
2311 					struct jesd216_erase_type *etp = &dev_data->erase_types[ei];  in flash_stm32_xspi_init()
2315 						etp->exp = 0;  in flash_stm32_xspi_init()
2316 						etp->cmd = 0;  in flash_stm32_xspi_init()
2318 						etp->cmd = cmd;  in flash_stm32_xspi_init()
2330 		return -ENODEV;  in flash_stm32_xspi_init()
2337 		LOG_ERR("Failed to enable memory-mapped mode: %d", ret);  in flash_stm32_xspi_init()
2340 	LOG_INF("Memory-mapped NOR-flash at 0x%lx (0x%x bytes)",  in flash_stm32_xspi_init()
2342 		dev_cfg->flash_size);  in flash_stm32_xspi_init()
2344 	LOG_INF("NOR external-flash at 0x%lx (0x%x bytes)",  in flash_stm32_xspi_init()
2346 		dev_cfg->flash_size);  in flash_stm32_xspi_init()