Lines Matching full:address

7 /* The absolute PHY address is 10 bit length. Last 5 bits for oldest
8  * part of address - see Clause 22 of IEEE 802.3.
59 /* Address Table Control And Status Register PHY Address */
61 /* Address Table Control And Status Register Register SAddress */
64 /* Address Table Access bussy flag offset */
66 /* Address Table Command Result flag offset */
68 /* Address Table Command Result flag mask */
71 /* Unicast Address Table Index*/
73 /* Multicast Address Table Index*/
78 /* Read a entry with sequence number of address table */
80 /* Write a entry with MAC address */
82 /* Delete a entry with MAC address */
84 /* Search a entry with MAC address */
89 /* Address Table Data 0 PHY Address */
91 /* Address Table Data 0 Register Address */
96 /* Address Table Data 1 PHY Address */
98 /* Address Table Data 1 Register Address */
101 /* Address Table Data 2 PHY Address */
103 /* Address Table Data 2 Register Address */
106 /* Address Table Data 3 PHY Address */
108 /* Address Table Data 3 Register Address */
111 /* Address Table Data 4 PHY Address */
113 /* Address Table Data 4 Register Address */
116 /* WoL Control Register PHY Address */
118 /* WoL Control Register Register Address */
121 /* Serial Bus Error Check PHY Address. */
123 /* Serial Bus Error Check Register Address. */
126 /* Serial Bus Control PHY Address. */
128 /* Serial Bus Control Register Address. */
133 /* PHY address 0x18h */
136 /* Interrupt Status Register PHY Address. */
138 /* Interrupt Status Register Register Address. */
141 /* Interrupt Mask & Control Register PHY Address. */
143 /* Interrupt Mask & Control Register Register Address. */
149 /* Energy Efficient Ethernet Control Register Address. */