Lines Matching full:dev

32 static int eth_enc28j60_soft_reset(const struct device *dev)  in eth_enc28j60_soft_reset()  argument
34 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_soft_reset()
48 static void eth_enc28j60_set_bank(const struct device *dev, uint16_t reg_addr) in eth_enc28j60_set_bank() argument
50 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_set_bank()
78 LOG_DBG("%s: Failure while setting bank to 0x%04x", dev->name, reg_addr); in eth_enc28j60_set_bank()
82 static void eth_enc28j60_write_reg(const struct device *dev, in eth_enc28j60_write_reg() argument
86 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_write_reg()
103 static void eth_enc28j60_read_reg(const struct device *dev, uint16_t reg_addr, in eth_enc28j60_read_reg() argument
106 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_read_reg()
137 LOG_DBG("%s: Failure while reading register 0x%04x", dev->name, reg_addr); in eth_enc28j60_read_reg()
142 static void eth_enc28j60_set_eth_reg(const struct device *dev, in eth_enc28j60_set_eth_reg() argument
146 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_set_eth_reg()
164 static void eth_enc28j60_clear_eth_reg(const struct device *dev, in eth_enc28j60_clear_eth_reg() argument
168 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_clear_eth_reg()
185 static void eth_enc28j60_write_mem(const struct device *dev, in eth_enc28j60_write_mem() argument
189 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_write_mem()
213 LOG_ERR("%s: Failed to write memory", dev->name); in eth_enc28j60_write_mem()
223 LOG_ERR("%s: Failed to write memory", dev->name); in eth_enc28j60_write_mem()
228 static void eth_enc28j60_read_mem(const struct device *dev, in eth_enc28j60_read_mem() argument
232 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_read_mem()
265 LOG_ERR("%s: Failed to read memory", dev->name); in eth_enc28j60_read_mem()
275 LOG_ERR("%s: Failed to read memory", dev->name); in eth_enc28j60_read_mem()
280 static void eth_enc28j60_write_phy(const struct device *dev, in eth_enc28j60_write_phy() argument
286 eth_enc28j60_set_bank(dev, ENC28J60_REG_MIREGADR); in eth_enc28j60_write_phy()
287 eth_enc28j60_write_reg(dev, ENC28J60_REG_MIREGADR, reg_addr); in eth_enc28j60_write_phy()
288 eth_enc28j60_write_reg(dev, ENC28J60_REG_MIWRL, data & 0xFF); in eth_enc28j60_write_phy()
289 eth_enc28j60_write_reg(dev, ENC28J60_REG_MIWRH, data >> 8); in eth_enc28j60_write_phy()
290 eth_enc28j60_set_bank(dev, ENC28J60_REG_MISTAT); in eth_enc28j60_write_phy()
295 eth_enc28j60_read_reg(dev, ENC28J60_REG_MISTAT, in eth_enc28j60_write_phy()
300 static void eth_enc28j60_read_phy(const struct device *dev, in eth_enc28j60_read_phy() argument
308 eth_enc28j60_set_bank(dev, ENC28J60_REG_MIREGADR); in eth_enc28j60_read_phy()
309 eth_enc28j60_write_reg(dev, ENC28J60_REG_MIREGADR, reg_addr); in eth_enc28j60_read_phy()
310 eth_enc28j60_write_reg(dev, ENC28J60_REG_MICMD, in eth_enc28j60_read_phy()
312 eth_enc28j60_set_bank(dev, ENC28J60_REG_MISTAT); in eth_enc28j60_read_phy()
317 eth_enc28j60_read_reg(dev, ENC28J60_REG_MISTAT, in eth_enc28j60_read_phy()
321 eth_enc28j60_set_bank(dev, ENC28J60_REG_MIREGADR); in eth_enc28j60_read_phy()
322 eth_enc28j60_write_reg(dev, ENC28J60_REG_MICMD, 0x0); in eth_enc28j60_read_phy()
323 eth_enc28j60_read_reg(dev, ENC28J60_REG_MIRDL, &lsb); in eth_enc28j60_read_phy()
324 eth_enc28j60_read_reg(dev, ENC28J60_REG_MIRDH, &msb); in eth_enc28j60_read_phy()
329 static void eth_enc28j60_gpio_callback(const struct device *dev, in eth_enc28j60_gpio_callback() argument
339 static int eth_enc28j60_init_buffers(const struct device *dev) in eth_enc28j60_init_buffers() argument
342 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_init_buffers()
345 eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXSTL); in eth_enc28j60_init_buffers()
346 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXSTL, in eth_enc28j60_init_buffers()
348 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXSTH, in eth_enc28j60_init_buffers()
350 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXRDPTL, in eth_enc28j60_init_buffers()
352 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXRDPTH, in eth_enc28j60_init_buffers()
354 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXNDL, in eth_enc28j60_init_buffers()
356 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXNDH, in eth_enc28j60_init_buffers()
358 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXSTL, in eth_enc28j60_init_buffers()
360 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXSTH, in eth_enc28j60_init_buffers()
362 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXNDL, in eth_enc28j60_init_buffers()
364 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXNDH, in eth_enc28j60_init_buffers()
366 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERDPTL, in eth_enc28j60_init_buffers()
368 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERDPTH, in eth_enc28j60_init_buffers()
370 eth_enc28j60_write_reg(dev, ENC28J60_REG_EWRPTL, in eth_enc28j60_init_buffers()
372 eth_enc28j60_write_reg(dev, ENC28J60_REG_EWRPTH, in eth_enc28j60_init_buffers()
375 eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXFCON); in eth_enc28j60_init_buffers()
376 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXFCON, in eth_enc28j60_init_buffers()
390 eth_enc28j60_read_reg(dev, ENC28J60_REG_ESTAT, &data_estat); in eth_enc28j60_init_buffers()
396 static void eth_enc28j60_init_mac(const struct device *dev) in eth_enc28j60_init_mac() argument
398 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_init_mac()
399 struct eth_enc28j60_runtime *context = dev->data; in eth_enc28j60_init_mac()
402 eth_enc28j60_set_bank(dev, ENC28J60_REG_MACON1); in eth_enc28j60_init_mac()
405 eth_enc28j60_read_reg(dev, ENC28J60_REG_MACON1, &data_macon); in eth_enc28j60_init_mac()
408 eth_enc28j60_write_reg(dev, ENC28J60_REG_MACON1, data_macon); in eth_enc28j60_init_mac()
416 eth_enc28j60_write_reg(dev, ENC28J60_REG_MACON3, data_macon); in eth_enc28j60_init_mac()
417 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAIPGL, ENC28J60_MAC_NBBIPGL); in eth_enc28j60_init_mac()
420 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAIPGH, in eth_enc28j60_init_mac()
422 eth_enc28j60_write_reg(dev, ENC28J60_REG_MABBIPG, in eth_enc28j60_init_mac()
425 eth_enc28j60_write_reg(dev, ENC28J60_REG_MABBIPG, in eth_enc28j60_init_mac()
427 eth_enc28j60_write_reg(dev, ENC28J60_REG_MACON4, 1 << 6); in eth_enc28j60_init_mac()
431 eth_enc28j60_set_bank(dev, ENC28J60_REG_MAADR1); in eth_enc28j60_init_mac()
432 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR6, in eth_enc28j60_init_mac()
434 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR5, in eth_enc28j60_init_mac()
436 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR4, in eth_enc28j60_init_mac()
438 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR3, in eth_enc28j60_init_mac()
440 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR2, in eth_enc28j60_init_mac()
442 eth_enc28j60_write_reg(dev, ENC28J60_REG_MAADR1, in eth_enc28j60_init_mac()
446 static void eth_enc28j60_init_phy(const struct device *dev) in eth_enc28j60_init_phy() argument
448 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_init_phy()
451 eth_enc28j60_write_phy(dev, ENC28J60_PHY_PHCON1, in eth_enc28j60_init_phy()
453 eth_enc28j60_write_phy(dev, ENC28J60_PHY_PHCON2, 0x0); in eth_enc28j60_init_phy()
455 eth_enc28j60_write_phy(dev, ENC28J60_PHY_PHCON1, 0x0); in eth_enc28j60_init_phy()
456 eth_enc28j60_write_phy(dev, ENC28J60_PHY_PHCON2, in eth_enc28j60_init_phy()
466 static int eth_enc28j60_tx(const struct device *dev, struct net_pkt *pkt) in eth_enc28j60_tx() argument
468 struct eth_enc28j60_runtime *context = dev->data; in eth_enc28j60_tx()
476 LOG_DBG("%s: pkt %p (len %u)", dev->name, pkt, len); in eth_enc28j60_tx()
488 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_ECON1, in eth_enc28j60_tx()
490 eth_enc28j60_clear_eth_reg(dev, ENC28J60_REG_ECON1, in eth_enc28j60_tx()
494 eth_enc28j60_set_bank(dev, ENC28J60_REG_ETXSTL); in eth_enc28j60_tx()
495 eth_enc28j60_write_reg(dev, ENC28J60_REG_EWRPTL, tx_bufaddr & 0xFF); in eth_enc28j60_tx()
496 eth_enc28j60_write_reg(dev, ENC28J60_REG_EWRPTH, tx_bufaddr >> 8); in eth_enc28j60_tx()
497 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXSTL, tx_bufaddr & 0xFF); in eth_enc28j60_tx()
498 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXSTH, tx_bufaddr >> 8); in eth_enc28j60_tx()
502 eth_enc28j60_write_mem(dev, &per_packet_control, 1); in eth_enc28j60_tx()
505 eth_enc28j60_write_mem(dev, frag->data, frag->len); in eth_enc28j60_tx()
509 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXNDL, in eth_enc28j60_tx()
511 eth_enc28j60_write_reg(dev, ENC28J60_REG_ETXNDH, tx_bufaddr_end >> 8); in eth_enc28j60_tx()
514 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_ECON1, in eth_enc28j60_tx()
520 eth_enc28j60_read_reg(dev, ENC28J60_REG_EIR, &tx_end); in eth_enc28j60_tx()
525 eth_enc28j60_read_reg(dev, ENC28J60_REG_ESTAT, &tx_end); in eth_enc28j60_tx()
530 LOG_ERR("%s: TX failed!", dev->name); in eth_enc28j60_tx()
539 eth_enc28j60_clear_eth_reg(dev, ENC28J60_REG_ESTAT, in eth_enc28j60_tx()
546 LOG_DBG("%s: Tx successful", dev->name); in eth_enc28j60_tx()
551 static void enc28j60_read_packet(const struct device *dev, uint16_t frm_len) in enc28j60_read_packet() argument
553 const struct eth_enc28j60_config *config = dev->config; in enc28j60_read_packet()
554 struct eth_enc28j60_runtime *context = dev->data; in enc28j60_read_packet()
564 LOG_ERR("%s: Could not allocate rx buffer", dev->name); in enc28j60_read_packet()
588 eth_enc28j60_read_mem(dev, data_ptr, spi_frame_len); in enc28j60_read_packet()
598 eth_enc28j60_read_mem(dev, dummy, 4); in enc28j60_read_packet()
604 eth_enc28j60_read_mem(dev, dummy, 1); in enc28j60_read_packet()
610 LOG_DBG("%s: Received packet of length %u", dev->name, lengthfr); in enc28j60_read_packet()
616 static int eth_enc28j60_rx(const struct device *dev) in eth_enc28j60_rx() argument
618 struct eth_enc28j60_runtime *context = dev->data; in eth_enc28j60_rx()
625 eth_enc28j60_set_bank(dev, ENC28J60_REG_EPKTCNT); in eth_enc28j60_rx()
626 eth_enc28j60_read_reg(dev, ENC28J60_REG_EPKTCNT, &counter); in eth_enc28j60_rx()
641 eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXRDPTL); in eth_enc28j60_rx()
642 eth_enc28j60_read_reg(dev, ENC28J60_REG_ERXRDPTL, &rdptl); in eth_enc28j60_rx()
643 eth_enc28j60_read_reg(dev, ENC28J60_REG_ERXRDPTH, &rdpth); in eth_enc28j60_rx()
644 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERDPTL, rdptl); in eth_enc28j60_rx()
645 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERDPTH, rdpth); in eth_enc28j60_rx()
648 eth_enc28j60_read_mem(dev, info, 2); in eth_enc28j60_rx()
661 eth_enc28j60_read_mem(dev, info, 4); in eth_enc28j60_rx()
668 enc28j60_read_packet(dev, frm_len); in eth_enc28j60_rx()
671 eth_enc28j60_set_bank(dev, ENC28J60_REG_ERXRDPTL); in eth_enc28j60_rx()
672 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXRDPTL, in eth_enc28j60_rx()
674 eth_enc28j60_write_reg(dev, ENC28J60_REG_ERXRDPTH, in eth_enc28j60_rx()
676 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_ECON2, in eth_enc28j60_rx()
680 eth_enc28j60_set_bank(dev, ENC28J60_REG_EPKTCNT); in eth_enc28j60_rx()
681 eth_enc28j60_read_reg(dev, ENC28J60_REG_EPKTCNT, &counter); in eth_enc28j60_rx()
690 eth_enc28j60_clear_eth_reg(dev, ENC28J60_REG_EIR, in eth_enc28j60_rx()
701 const struct device *dev = p1; in eth_enc28j60_rx_thread() local
702 struct eth_enc28j60_runtime *context = dev->data; in eth_enc28j60_rx_thread()
711 eth_enc28j60_clear_eth_reg(dev, ENC28J60_REG_EIE, ENC28J60_BIT_EIE_INTIE); in eth_enc28j60_rx_thread()
713 eth_enc28j60_read_reg(dev, ENC28J60_REG_EIR, &int_stat); in eth_enc28j60_rx_thread()
718 eth_enc28j60_read_phy(dev, ENC28J60_PHY_PHIR, &phir); in eth_enc28j60_rx_thread()
719 eth_enc28j60_read_phy(dev, ENC28J60_PHY_PHSTAT2, &phstat2); in eth_enc28j60_rx_thread()
721 LOG_INF("%s: Link up", dev->name); in eth_enc28j60_rx_thread()
731 LOG_INF("%s: Link down", dev->name); in eth_enc28j60_rx_thread()
742 eth_enc28j60_rx(dev); in eth_enc28j60_rx_thread()
745 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_EIE, ENC28J60_BIT_EIE_INTIE); in eth_enc28j60_rx_thread()
749 static enum ethernet_hw_caps eth_enc28j60_get_capabilities(const struct device *dev) in eth_enc28j60_get_capabilities() argument
751 ARG_UNUSED(dev); in eth_enc28j60_get_capabilities()
762 const struct device *dev = net_if_get_device(iface); in eth_enc28j60_iface_init() local
763 struct eth_enc28j60_runtime *context = dev->data; in eth_enc28j60_iface_init()
791 static int eth_enc28j60_init(const struct device *dev) in eth_enc28j60_init() argument
793 const struct eth_enc28j60_config *config = dev->config; in eth_enc28j60_init()
794 struct eth_enc28j60_runtime *context = dev->data; in eth_enc28j60_init()
798 LOG_ERR("%s: SPI master port %s not ready", dev->name, config->spi.bus->name); in eth_enc28j60_init()
804 LOG_ERR("%s: GPIO port %s not ready", dev->name, config->interrupt.port->name); in eth_enc28j60_init()
809 LOG_ERR("%s: Unable to configure GPIO pin %u", dev->name, config->interrupt.pin); in eth_enc28j60_init()
823 if (eth_enc28j60_soft_reset(dev)) { in eth_enc28j60_init()
824 LOG_ERR("%s: Soft-reset failed", dev->name); in eth_enc28j60_init()
845 if (eth_enc28j60_init_buffers(dev)) { in eth_enc28j60_init()
848 eth_enc28j60_init_mac(dev); in eth_enc28j60_init()
849 eth_enc28j60_init_phy(dev); in eth_enc28j60_init()
852 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_EIE, ENC28J60_BIT_EIE_INTIE); in eth_enc28j60_init()
853 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_EIE, ENC28J60_BIT_EIE_PKTIE); in eth_enc28j60_init()
854 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_EIE, ENC28J60_BIT_EIE_LINKIE); in eth_enc28j60_init()
855 eth_enc28j60_write_phy(dev, ENC28J60_PHY_PHIE, ENC28J60_BIT_PHIE_PGEIE | in eth_enc28j60_init()
859 eth_enc28j60_set_eth_reg(dev, ENC28J60_REG_ECON1, in eth_enc28j60_init()
866 (void *)dev, NULL, NULL, in eth_enc28j60_init()
870 LOG_INF("%s: Initialized", dev->name); in eth_enc28j60_init()