Lines Matching +full:initial +full:- +full:timeout +full:- +full:ms
4 * SPDX-License-Identifier: Apache-2.0
21 /* Maximum timeout to transmit a virtual wire packet.
22 * 10 ms expressed in multiples of 100us
28 /* 200ms */
34 * length specified is non-zero.
116 * --------------------------------------------------------------------------------|
118 * --------------------------------------------------------------------------------|
120 * --------------------------------------------------------------------------------|
127 * --------------------------------------------------------------------------------|
129 * --------------------------------------------------------------------------------|
231 uint8_t cap0 = ESPI_CAP_REGS->GLB_CAP0; in espi_xec_configure()
232 uint8_t cap1 = ESPI_CAP_REGS->GLB_CAP1; in espi_xec_configure()
239 switch (cfg->max_freq) { in espi_xec_configure()
256 return -EINVAL; in espi_xec_configure()
260 iomode = (cfg->io_caps >> 1); in espi_xec_configure()
262 return -EINVAL; in espi_xec_configure()
273 if (cfg->channel_caps & ESPI_CHANNEL_PERIPHERAL) { in espi_xec_configure()
277 return -EINVAL; in espi_xec_configure()
281 if (cfg->channel_caps & ESPI_CHANNEL_VWIRE) { in espi_xec_configure()
285 return -EINVAL; in espi_xec_configure()
289 if (cfg->channel_caps & ESPI_CHANNEL_OOB) { in espi_xec_configure()
293 return -EINVAL; in espi_xec_configure()
297 if (cfg->channel_caps & ESPI_CHANNEL_FLASH) { in espi_xec_configure()
302 return -EINVAL; in espi_xec_configure()
306 ESPI_CAP_REGS->GLB_CAP0 = cap0; in espi_xec_configure()
307 ESPI_CAP_REGS->GLB_CAP1 = cap1; in espi_xec_configure()
311 * de-assertion and after pinmux in espi_xec_configure()
313 ESPI_EIO_BAR_REGS->IO_ACTV = 1; in espi_xec_configure()
326 sts = ESPI_CAP_REGS->PC_RDY & MCHP_ESPI_PC_READY; in espi_xec_channel_ready()
329 sts = ESPI_CAP_REGS->VW_RDY & MCHP_ESPI_VW_READY; in espi_xec_channel_ready()
332 sts = ESPI_CAP_REGS->OOB_RDY & MCHP_ESPI_OOB_READY; in espi_xec_channel_ready()
335 sts = ESPI_CAP_REGS->FC_RDY & MCHP_ESPI_FC_READY; in espi_xec_channel_ready()
353 if (!(KBC_REGS->KBC_CTRL & MCHP_KBC_CTRL_OBFEN)) { in espi_xec_read_lpc_request()
354 return -ENOTSUP; in espi_xec_read_lpc_request()
363 *data = KBC_REGS->EC_KBC_STS & MCHP_KBC_STS_OBF ? 1 : 0; in espi_xec_read_lpc_request()
366 *data = KBC_REGS->EC_KBC_STS & MCHP_KBC_STS_IBF ? 1 : 0; in espi_xec_read_lpc_request()
369 *data = KBC_REGS->EC_KBC_STS; in espi_xec_read_lpc_request()
372 return -EINVAL; in espi_xec_read_lpc_request()
375 return -ENOTSUP; in espi_xec_read_lpc_request()
386 (struct espi_xec_config *) (dev->config); in espi_xec_write_lpc_request()
392 if (!(KBC_REGS->KBC_CTRL & MCHP_KBC_CTRL_OBFEN)) { in espi_xec_write_lpc_request()
393 return -ENOTSUP; in espi_xec_write_lpc_request()
398 KBC_REGS->EC_DATA = *data & 0xff; in espi_xec_write_lpc_request()
401 KBC_REGS->EC_AUX_DATA = *data & 0xff; in espi_xec_write_lpc_request()
404 MCHP_GIRQ_SRC(config->pc_girq_id) = MCHP_KBC_IBF_GIRQ; in espi_xec_write_lpc_request()
405 MCHP_GIRQ_ENSET(config->pc_girq_id) = MCHP_KBC_IBF_GIRQ; in espi_xec_write_lpc_request()
408 MCHP_GIRQ_ENCLR(config->pc_girq_id) = MCHP_KBC_IBF_GIRQ; in espi_xec_write_lpc_request()
411 dummy = KBC_REGS->HOST_AUX_DATA; in espi_xec_write_lpc_request()
417 KBC_REGS->EC_KBC_STS |= *data; in espi_xec_write_lpc_request()
423 KBC_REGS->EC_KBC_STS &= ~(*data); in espi_xec_write_lpc_request()
426 return -EINVAL; in espi_xec_write_lpc_request()
429 return -ENOTSUP; in espi_xec_write_lpc_request()
445 return -EINVAL; in espi_xec_send_vwire()
449 ESPI_MSVW_REG *reg = &(ESPI_M2S_VW_REGS->MSVW00) + xec_id; in espi_xec_send_vwire()
450 uint8_t *p8 = (uint8_t *)®->SRC; in espi_xec_send_vwire()
456 ESPI_SMVW_REG *reg = &(ESPI_S2M_VW_REGS->SMVW00) + xec_id; in espi_xec_send_vwire()
457 uint8_t *p8 = (uint8_t *)®->SRC; in espi_xec_send_vwire()
466 while (reg->SRC_CHG && rd_cnt--) { in espi_xec_send_vwire()
483 return -EINVAL; in espi_xec_receive_vwire()
487 ESPI_MSVW_REG *reg = &(ESPI_M2S_VW_REGS->MSVW00) + xec_id; in espi_xec_receive_vwire()
488 *level = ((reg->SRC >> (src_id << 3)) & 0x01ul); in espi_xec_receive_vwire()
492 ESPI_SMVW_REG *reg = &(ESPI_S2M_VW_REGS->SMVW00) + xec_id; in espi_xec_receive_vwire()
493 *level = ((reg->SRC >> (src_id << 3)) & 0x01ul); in espi_xec_receive_vwire()
504 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_send_oob()
511 if (!(ESPI_OOB_REGS->TX_STS & MCHP_ESPI_OOB_TX_STS_CHEN)) { in espi_xec_send_oob()
513 return -EIO; in espi_xec_send_oob()
516 if (ESPI_OOB_REGS->TX_STS & MCHP_ESPI_OOB_TX_STS_BUSY) { in espi_xec_send_oob()
518 return -EBUSY; in espi_xec_send_oob()
521 if (pckt->len > CONFIG_ESPI_OOB_BUFFER_SIZE) { in espi_xec_send_oob()
523 return -EINVAL; in espi_xec_send_oob()
526 memcpy(target_tx_mem, pckt->buf, pckt->len); in espi_xec_send_oob()
528 ESPI_OOB_REGS->TX_LEN = pckt->len; in espi_xec_send_oob()
529 ESPI_OOB_REGS->TX_CTRL = MCHP_ESPI_OOB_TX_CTRL_START; in espi_xec_send_oob()
530 LOG_DBG("%s %d", __func__, ESPI_OOB_REGS->TX_LEN); in espi_xec_send_oob()
532 /* Wait until ISR or timeout */ in espi_xec_send_oob()
533 ret = k_sem_take(&data->tx_lock, K_MSEC(MAX_OOB_TIMEOUT)); in espi_xec_send_oob()
534 if (ret == -EAGAIN) { in espi_xec_send_oob()
535 return -ETIMEDOUT; in espi_xec_send_oob()
538 if (ESPI_OOB_REGS->TX_STS & err_mask) { in espi_xec_send_oob()
539 LOG_ERR("Tx failed %x", ESPI_OOB_REGS->TX_STS); in espi_xec_send_oob()
540 ESPI_OOB_REGS->TX_STS = err_mask; in espi_xec_send_oob()
541 return -EIO; in espi_xec_send_oob()
553 if (ESPI_OOB_REGS->TX_STS & err_mask) { in espi_xec_receive_oob()
554 return -EIO; in espi_xec_receive_oob()
559 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_receive_oob()
561 /* Wait until ISR or timeout */ in espi_xec_receive_oob()
562 ret = k_sem_take(&data->rx_lock, K_MSEC(MAX_OOB_TIMEOUT)); in espi_xec_receive_oob()
563 if (ret == -EAGAIN) { in espi_xec_receive_oob()
564 return -ETIMEDOUT; in espi_xec_receive_oob()
568 uint32_t rcvd_len = ESPI_OOB_REGS->RX_LEN & MCHP_ESPI_OOB_RX_LEN_MASK; in espi_xec_receive_oob()
570 if (rcvd_len > pckt->len) { in espi_xec_receive_oob()
571 LOG_ERR("space rcvd %d vs %d", rcvd_len, pckt->len); in espi_xec_receive_oob()
572 return -EIO; in espi_xec_receive_oob()
575 pckt->len = rcvd_len; in espi_xec_receive_oob()
576 memcpy(pckt->buf, target_rx_mem, pckt->len); in espi_xec_receive_oob()
577 memset(target_rx_mem, 0, pckt->len); in espi_xec_receive_oob()
582 ESPI_OOB_REGS->RX_CTRL |= MCHP_ESPI_OOB_RX_CTRL_AVAIL; in espi_xec_receive_oob()
593 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_flash_read()
601 if (!(ESPI_FC_REGS->STS & MCHP_ESPI_FC_STS_CHAN_EN)) { in espi_xec_flash_read()
603 return -EIO; in espi_xec_flash_read()
606 if (pckt->len > CONFIG_ESPI_FLASH_BUFFER_SIZE) { in espi_xec_flash_read()
608 return -EINVAL; in espi_xec_flash_read()
611 ESPI_FC_REGS->FL_ADDR_MSW = 0; in espi_xec_flash_read()
612 ESPI_FC_REGS->FL_ADDR_LSW = pckt->flash_addr; in espi_xec_flash_read()
613 ESPI_FC_REGS->MEM_ADDR_MSW = 0; in espi_xec_flash_read()
614 ESPI_FC_REGS->MEM_ADDR_LSW = (uint32_t)&target_mem[0]; in espi_xec_flash_read()
615 ESPI_FC_REGS->XFR_LEN = pckt->len; in espi_xec_flash_read()
616 ESPI_FC_REGS->CTRL = MCHP_ESPI_FC_CTRL_FUNC(MCHP_ESPI_FC_CTRL_RD0); in espi_xec_flash_read()
617 ESPI_FC_REGS->CTRL |= MCHP_ESPI_FC_CTRL_START; in espi_xec_flash_read()
619 /* Wait until ISR or timeout */ in espi_xec_flash_read()
620 ret = k_sem_take(&data->flash_lock, K_MSEC(MAX_FLASH_TIMEOUT)); in espi_xec_flash_read()
621 if (ret == -EAGAIN) { in espi_xec_flash_read()
622 LOG_ERR("%s timeout", __func__); in espi_xec_flash_read()
623 return -ETIMEDOUT; in espi_xec_flash_read()
626 if (ESPI_FC_REGS->STS & err_mask) { in espi_xec_flash_read()
628 ESPI_FC_REGS->STS = err_mask; in espi_xec_flash_read()
629 return -EIO; in espi_xec_flash_read()
632 memcpy(pckt->buf, target_mem, pckt->len); in espi_xec_flash_read()
646 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_flash_write()
650 if (sizeof(target_mem) < pckt->len) { in espi_xec_flash_write()
652 return -ENOMEM; in espi_xec_flash_write()
655 if (!(ESPI_FC_REGS->STS & MCHP_ESPI_FC_STS_CHAN_EN)) { in espi_xec_flash_write()
657 return -EIO; in espi_xec_flash_write()
660 if ((ESPI_FC_REGS->CFG & MCHP_ESPI_FC_CFG_BUSY)) { in espi_xec_flash_write()
662 return -EBUSY; in espi_xec_flash_write()
665 memcpy(target_mem, pckt->buf, pckt->len); in espi_xec_flash_write()
667 ESPI_FC_REGS->FL_ADDR_MSW = 0; in espi_xec_flash_write()
668 ESPI_FC_REGS->FL_ADDR_LSW = pckt->flash_addr; in espi_xec_flash_write()
669 ESPI_FC_REGS->MEM_ADDR_MSW = 0; in espi_xec_flash_write()
670 ESPI_FC_REGS->MEM_ADDR_LSW = (uint32_t)&target_mem[0]; in espi_xec_flash_write()
671 ESPI_FC_REGS->XFR_LEN = pckt->len; in espi_xec_flash_write()
672 ESPI_FC_REGS->CTRL = MCHP_ESPI_FC_CTRL_FUNC(MCHP_ESPI_FC_CTRL_WR0); in espi_xec_flash_write()
673 ESPI_FC_REGS->CTRL |= MCHP_ESPI_FC_CTRL_START; in espi_xec_flash_write()
675 /* Wait until ISR or timeout */ in espi_xec_flash_write()
676 ret = k_sem_take(&data->flash_lock, K_MSEC(MAX_FLASH_TIMEOUT)); in espi_xec_flash_write()
677 if (ret == -EAGAIN) { in espi_xec_flash_write()
678 LOG_ERR("%s timeout", __func__); in espi_xec_flash_write()
679 return -ETIMEDOUT; in espi_xec_flash_write()
682 if (ESPI_FC_REGS->STS & err_mask) { in espi_xec_flash_write()
684 ESPI_FC_REGS->STS = err_mask; in espi_xec_flash_write()
685 return -EIO; in espi_xec_flash_write()
701 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_flash_erase()
705 if (!(ESPI_FC_REGS->STS & MCHP_ESPI_FC_STS_CHAN_EN)) { in espi_xec_flash_erase()
707 return -EIO; in espi_xec_flash_erase()
710 if ((ESPI_FC_REGS->CFG & MCHP_ESPI_FC_CFG_BUSY)) { in espi_xec_flash_erase()
712 return -EBUSY; in espi_xec_flash_erase()
716 status = ESPI_FC_REGS->STS; in espi_xec_flash_erase()
717 ESPI_FC_REGS->STS = status; in espi_xec_flash_erase()
719 ESPI_FC_REGS->FL_ADDR_MSW = 0; in espi_xec_flash_erase()
720 ESPI_FC_REGS->FL_ADDR_LSW = pckt->flash_addr; in espi_xec_flash_erase()
721 ESPI_FC_REGS->XFR_LEN = ESPI_FLASH_ERASE_DUMMY; in espi_xec_flash_erase()
722 ESPI_FC_REGS->CTRL = MCHP_ESPI_FC_CTRL_FUNC(MCHP_ESPI_FC_CTRL_ERS0); in espi_xec_flash_erase()
723 ESPI_FC_REGS->CTRL |= MCHP_ESPI_FC_CTRL_START; in espi_xec_flash_erase()
725 /* Wait until ISR or timeout */ in espi_xec_flash_erase()
726 ret = k_sem_take(&data->flash_lock, K_MSEC(MAX_FLASH_TIMEOUT)); in espi_xec_flash_erase()
727 if (ret == -EAGAIN) { in espi_xec_flash_erase()
728 LOG_ERR("%s timeout", __func__); in espi_xec_flash_erase()
729 return -ETIMEDOUT; in espi_xec_flash_erase()
732 if (ESPI_FC_REGS->STS & err_mask) { in espi_xec_flash_erase()
734 ESPI_FC_REGS->STS = err_mask; in espi_xec_flash_erase()
735 return -EIO; in espi_xec_flash_erase()
745 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_manage_callback()
747 return espi_manage_callback(&data->callbacks, callback, set); in espi_xec_manage_callback()
770 (struct espi_xec_config *) (dev->config); in espi_init_oob()
773 MCHP_GIRQ_ENSET(config->bus_girq_id) = (MCHP_ESPI_OOB_UP_GIRQ_VAL | in espi_init_oob()
776 ESPI_OOB_REGS->TX_ADDR_MSW = 0; in espi_init_oob()
777 ESPI_OOB_REGS->RX_ADDR_MSW = 0; in espi_init_oob()
778 ESPI_OOB_REGS->TX_ADDR_LSW = (uint32_t)&target_tx_mem[0]; in espi_init_oob()
779 ESPI_OOB_REGS->RX_ADDR_LSW = (uint32_t)&target_rx_mem[0]; in espi_init_oob()
780 ESPI_OOB_REGS->RX_LEN = 0x00FF0000; in espi_init_oob()
783 ESPI_OOB_REGS->TX_IEN |= MCHP_ESPI_OOB_TX_IEN_CHG_EN | in espi_init_oob()
789 ESPI_OOB_REGS->RX_IEN |= MCHP_ESPI_OOB_RX_IEN; in espi_init_oob()
790 ESPI_OOB_REGS->RX_CTRL |= MCHP_ESPI_OOB_RX_CTRL_AVAIL; in espi_init_oob()
798 (struct espi_xec_config *)(dev->config); in espi_init_flash()
803 LOG_DBG("%s ESPI_FC_REGS->CFG %X", __func__, ESPI_FC_REGS->CFG); in espi_init_flash()
804 ESPI_FC_REGS->STS = MCHP_ESPI_FC_STS_DONE; in espi_init_flash()
807 MCHP_GIRQ_ENSET(config->bus_girq_id) = BIT(MCHP_ESPI_FC_GIRQ_POS); in espi_init_flash()
808 ESPI_FC_REGS->IEN |= MCHP_ESPI_FC_IEN_CHG_EN; in espi_init_flash()
809 ESPI_FC_REGS->IEN |= MCHP_ESPI_FC_IEN_DONE; in espi_init_flash()
815 const struct espi_xec_config *config = dev->config; in espi_bus_init()
818 MCHP_GIRQ_ENSET(config->bus_girq_id) = MCHP_ESPI_ESPI_RST_GIRQ_VAL | in espi_bus_init()
824 ESPI_SMVW_REG *reg = &(ESPI_S2M_VW_REGS->SMVW06); in espi_config_vw_ocb()
826 /* Keep index bits [7:0] in initial 0h value (disabled state) */ in espi_config_vw_ocb()
829 * register from all except chip level resets and set initial state in espi_config_vw_ocb()
834 * initial value '1'. in espi_config_vw_ocb()
848 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_rst_isr()
851 rst_sts = ESPI_CAP_REGS->ERST_STS; in espi_rst_isr()
854 ESPI_CAP_REGS->ERST_STS = MCHP_ESPI_RST_ISTS; in espi_rst_isr()
863 espi_send_callbacks(&data->callbacks, dev, evt); in espi_rst_isr()
887 ESPI_EIO_BAR_REGS->EC_BAR_UART_0 = ESPI_XEC_UART0_BAR_ADDRESS | in config_sub_devices()
891 ESPI_EIO_BAR_REGS->EC_BAR_UART_1 = ESPI_XEC_UART0_BAR_ADDRESS | in config_sub_devices()
895 ESPI_EIO_BAR_REGS->EC_BAR_UART_2 = ESPI_XEC_UART0_BAR_ADDRESS | in config_sub_devices()
901 KBC_REGS->KBC_CTRL |= MCHP_KBC_CTRL_AUXH; in config_sub_devices()
902 KBC_REGS->KBC_CTRL |= MCHP_KBC_CTRL_OBFEN; in config_sub_devices()
904 KBC_REGS->KBC_PORT92_EN = MCHP_KBC_PORT92_EN; in config_sub_devices()
905 ESPI_EIO_BAR_REGS->EC_BAR_KBC = ESPI_XEC_KBC_BAR_ADDRESS | in config_sub_devices()
909 ESPI_EIO_BAR_REGS->EC_BAR_ACPI_EC_0 |= MCHP_ESPI_IO_BAR_HOST_VALID; in config_sub_devices()
910 ESPI_EIO_BAR_REGS->EC_BAR_MBOX = ESPI_XEC_MBOX_BAR_ADDRESS | in config_sub_devices()
914 ESPI_EIO_BAR_REGS->EC_BAR_ACPI_EC_1 = in config_sub_devices()
917 ESPI_EIO_BAR_REGS->EC_BAR_MBOX = ESPI_XEC_MBOX_BAR_ADDRESS | in config_sub_devices()
922 ESPI_EIO_BAR_REGS->EC_BAR_P80CAP_0 = ESPI_XEC_PORT80_BAR_ADDRESS | in config_sub_devices()
924 PORT80_CAP0_REGS->ACTV = 1; in config_sub_devices()
925 ESPI_EIO_BAR_REGS->EC_BAR_P80CAP_1 = ESPI_XEC_PORT81_BAR_ADDRESS | in config_sub_devices()
927 PORT80_CAP1_REGS->ACTV = 1; in config_sub_devices()
936 ESPI_SIRQ_REGS->UART_0_SIRQ = UART_DEFAULT_IRQ; in configure_sirq()
939 ESPI_SIRQ_REGS->UART_1_SIRQ = UART_DEFAULT_IRQ; in configure_sirq()
942 ESPI_SIRQ_REGS->UART_2_SIRQ = UART_DEFAULT_IRQ; in configure_sirq()
947 ESPI_SIRQ_REGS->KBC_SIRQ_0 = 0x01; in configure_sirq()
948 ESPI_SIRQ_REGS->KBC_SIRQ_1 = 0x0C; in configure_sirq()
955 ESPI_EIO_BAR_REGS->EC_BAR_IOC = (host_address << 16) | in setup_espi_io_config()
961 ESPI_PC_REGS->PC_STATUS = (MCHP_ESPI_PC_STS_EN_CHG | in setup_espi_io_config()
963 ESPI_PC_REGS->PC_IEN |= MCHP_ESPI_PC_IEN_EN_CHG; in setup_espi_io_config()
964 ESPI_CAP_REGS->PC_RDY = 1; in setup_espi_io_config()
969 uint32_t status = ESPI_PC_REGS->PC_STATUS; in espi_pc_isr()
976 ESPI_PC_REGS->PC_STATUS = MCHP_ESPI_PC_STS_EN_CHG; in espi_pc_isr()
982 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_vwire_chanel_isr()
983 const struct espi_xec_config *config = dev->config; in espi_vwire_chanel_isr()
989 status = ESPI_IO_VW_REGS->VW_EN_STS; in espi_vwire_chanel_isr()
992 ESPI_IO_VW_REGS->VW_RDY = 1; in espi_vwire_chanel_isr()
995 MCHP_GIRQ_ENCLR(config->bus_girq_id) = MCHP_ESPI_VW_EN_GIRQ_VAL; in espi_vwire_chanel_isr()
1001 espi_send_callbacks(&data->callbacks, dev, evt); in espi_vwire_chanel_isr()
1008 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_oob_down_isr()
1015 status = ESPI_OOB_REGS->RX_STS; in espi_oob_down_isr()
1019 /* Register is write-on-clear, ensure only 1 bit is affected */ in espi_oob_down_isr()
1020 ESPI_OOB_REGS->RX_STS = MCHP_ESPI_OOB_RX_STS_DONE; in espi_oob_down_isr()
1023 k_sem_give(&data->rx_lock); in espi_oob_down_isr()
1025 evt.evt_details = ESPI_OOB_REGS->RX_LEN & MCHP_ESPI_OOB_RX_LEN_MASK; in espi_oob_down_isr()
1026 espi_send_callbacks(&data->callbacks, dev, evt); in espi_oob_down_isr()
1034 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_oob_up_isr()
1040 status = ESPI_OOB_REGS->TX_STS; in espi_oob_up_isr()
1044 /* Register is write-on-clear, ensure only 1 bit is affected */ in espi_oob_up_isr()
1045 ESPI_OOB_REGS->TX_STS = MCHP_ESPI_OOB_TX_STS_DONE; in espi_oob_up_isr()
1046 k_sem_give(&data->tx_lock); in espi_oob_up_isr()
1053 ESPI_CAP_REGS->OOB_RDY = 1; in espi_oob_up_isr()
1057 ESPI_OOB_REGS->TX_STS = MCHP_ESPI_OOB_TX_STS_CHG_EN; in espi_oob_up_isr()
1058 espi_send_callbacks(&data->callbacks, dev, evt); in espi_oob_up_isr()
1067 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_flash_isr()
1073 status = ESPI_FC_REGS->STS; in espi_flash_isr()
1078 ESPI_FC_REGS->STS = MCHP_ESPI_FC_STS_DONE; in espi_flash_isr()
1080 k_sem_give(&data->flash_lock); in espi_flash_isr()
1085 ESPI_FC_REGS->STS = MCHP_ESPI_FC_STS_CHAN_EN_CHG; in espi_flash_isr()
1090 ESPI_CAP_REGS->FC_RDY = MCHP_ESPI_FC_READY; in espi_flash_isr()
1094 espi_send_callbacks(&data->callbacks, dev, evt); in espi_flash_isr()
1101 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in vw_pltrst_isr()
1113 espi_send_callbacks(&data->callbacks, dev, evt); in vw_pltrst_isr()
1120 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in notify_system_state()
1127 espi_send_callbacks(&data->callbacks, dev, evt); in notify_system_state()
1139 (struct espi_xec_data *)(dev->data); in notify_host_warning()
1144 espi_send_callbacks(&data->callbacks, dev, evt); in notify_host_warning()
1223 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in ibf_isr()
1228 espi_send_callbacks(&data->callbacks, dev, evt); in ibf_isr()
1234 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in ibf_pvt_isr()
1241 espi_send_callbacks(&data->callbacks, dev, evt); in ibf_pvt_isr()
1247 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in ibf_kbc_isr()
1253 uint32_t isr_data = ((KBC_REGS->EC_DATA & 0xFF) << E8042_ISR_DATA_POS) | in ibf_kbc_isr()
1254 ((KBC_REGS->EC_KBC_STS & MCHP_KBC_STS_CD) << in ibf_kbc_isr()
1263 espi_send_callbacks(&data->callbacks, dev, evt); in ibf_kbc_isr()
1268 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in port80_isr()
1274 evt.evt_data = PORT80_CAP0_REGS->EC_DATA; in port80_isr()
1275 espi_send_callbacks(&data->callbacks, dev, evt); in port80_isr()
1280 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in port81_isr()
1286 evt.evt_data = PORT80_CAP1_REGS->EC_DATA; in port81_isr()
1287 espi_send_callbacks(&data->callbacks, dev, evt); in port81_isr()
1344 const struct espi_xec_config *config = dev->config; in espi_xec_bus_isr()
1347 girq_result = MCHP_GIRQ_RESULT(config->bus_girq_id); in espi_xec_bus_isr()
1359 REG32(MCHP_GIRQ_SRC_ADDR(config->bus_girq_id)) = girq_result; in espi_xec_bus_isr()
1364 const struct espi_xec_config *config = dev->config; in espi_xec_vw_isr()
1367 girq_result = MCHP_GIRQ_RESULT(config->vw_girq_ids[0]); in espi_xec_vw_isr()
1368 MCHP_GIRQ_SRC(config->vw_girq_ids[0]) = girq_result; in espi_xec_vw_isr()
1393 const struct espi_xec_config *config = dev->config; in espi_xec_vw_ext_isr()
1396 girq_result = MCHP_GIRQ_RESULT(config->vw_girq_ids[1]); in espi_xec_vw_ext_isr()
1397 MCHP_GIRQ_SRC(config->vw_girq_ids[1]) = girq_result; in espi_xec_vw_ext_isr()
1413 const struct espi_xec_config *config = dev->config; in espi_xec_periph_isr()
1416 girq_result = MCHP_GIRQ_RESULT(config->pc_girq_id); in espi_xec_periph_isr()
1428 REG32(MCHP_GIRQ_SRC_ADDR(config->pc_girq_id)) = girq_result; in espi_xec_periph_isr()
1473 const struct espi_xec_config *config = dev->config; in espi_xec_init()
1474 struct espi_xec_data *data = (struct espi_xec_data *)(dev->data); in espi_xec_init()
1477 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); in espi_xec_init()
1484 PCR_REGS->PWR_RST_CTRL = MCHP_PCR_PR_CTRL_USE_ESPI_PLTRST; in espi_xec_init()
1485 ESPI_CAP_REGS->PLTRST_SRC = MCHP_ESPI_PLTRST_SRC_IS_VW; in espi_xec_init()
1488 ESPI_CAP_REGS->GLB_CAP0 |= MCHP_ESPI_GBL_CAP0_VW_SUPP; in espi_xec_init()
1489 ESPI_CAP_REGS->GLB_CAP0 |= MCHP_ESPI_GBL_CAP0_PC_SUPP; in espi_xec_init()
1492 ESPI_CAP_REGS->VW_CAP = ESPI_NUM_SMVW; in espi_xec_init()
1493 ESPI_CAP_REGS->PC_CAP |= MCHP_ESPI_PC_CAP_MAX_PLD_SZ_64; in espi_xec_init()
1496 ESPI_CAP_REGS->GLB_CAP0 |= MCHP_ESPI_GBL_CAP0_OOB_SUPP; in espi_xec_init()
1497 ESPI_CAP_REGS->OOB_CAP |= MCHP_ESPI_OOB_CAP_MAX_PLD_SZ_73; in espi_xec_init()
1499 k_sem_init(&data->tx_lock, 0, 1); in espi_xec_init()
1501 k_sem_init(&data->rx_lock, 0, 1); in espi_xec_init()
1504 ESPI_CAP_REGS->GLB_CAP0 &= ~MCHP_ESPI_GBL_CAP0_OOB_SUPP; in espi_xec_init()
1508 ESPI_CAP_REGS->GLB_CAP0 |= MCHP_ESPI_GBL_CAP0_FC_SUPP; in espi_xec_init()
1509 ESPI_CAP_REGS->GLB_CAP0 |= MCHP_ESPI_FC_CAP_MAX_PLD_SZ_64; in espi_xec_init()
1510 ESPI_CAP_REGS->FC_CAP |= MCHP_ESPI_FC_CAP_SHARE_MAF_SAF; in espi_xec_init()
1511 ESPI_CAP_REGS->FC_CAP |= MCHP_ESPI_FC_CAP_MAX_RD_SZ_64; in espi_xec_init()
1513 k_sem_init(&data->flash_lock, 0, 1); in espi_xec_init()
1515 ESPI_CAP_REGS->GLB_CAP0 &= ~MCHP_ESPI_GBL_CAP0_FC_SUPP; in espi_xec_init()
1519 ESPI_CAP_REGS->ERST_STS = MCHP_ESPI_RST_ISTS; in espi_xec_init()
1520 ESPI_CAP_REGS->ERST_IEN |= MCHP_ESPI_RST_IEN; in espi_xec_init()
1521 ESPI_PC_REGS->PC_STATUS = MCHP_ESPI_PC_STS_EN_CHG; in espi_xec_init()
1522 ESPI_PC_REGS->PC_IEN |= MCHP_ESPI_PC_IEN_EN_CHG; in espi_xec_init()
1529 ESPI_MSVW_REG *reg = &(ESPI_M2S_VW_REGS->MSVW00) + xec_id; in espi_xec_init()
1536 MCHP_GIRQ_ENSET(config->bus_girq_id) = MCHP_ESPI_ESPI_RST_GIRQ_VAL | in espi_xec_init()
1546 MCHP_GIRQ_ENSET(config->vw_girq_ids[0]) = MEC_ESPI_MSVW00_SRC0_VAL | in espi_xec_init()
1553 MCHP_GIRQ_ENSET(config->pc_girq_id) = MCHP_KBC_IBF_GIRQ; in espi_xec_init()
1556 MCHP_GIRQ_ENSET(config->pc_girq_id) = MCHP_ACPI_EC_0_IBF_GIRQ; in espi_xec_init()
1557 MCHP_GIRQ_ENSET(config->pc_girq_id) = MCHP_ACPI_EC_2_IBF_GIRQ; in espi_xec_init()
1560 MCHP_GIRQ_ENSET(config->pc_girq_id) = MCHP_ACPI_EC_1_IBF_GIRQ; in espi_xec_init()
1563 MCHP_GIRQ_ENSET(config->pc_girq_id) = MCHP_PORT80_DEBUG0_GIRQ_VAL | in espi_xec_init()
1567 MCHP_GIRQ_BLK_SETEN(config->bus_girq_id); in espi_xec_init()
1575 MCHP_GIRQ_BLK_SETEN(config->vw_girq_ids[0]); in espi_xec_init()
1583 MCHP_GIRQ_BLK_SETEN(config->pc_girq_id); in espi_xec_init()
1591 MCHP_GIRQ_ENSET(config->vw_girq_ids[1]) = MEC_ESPI_MSVW08_SRC1_VAL; in espi_xec_init()
1592 MCHP_GIRQ_BLK_SETEN(config->vw_girq_ids[1]); in espi_xec_init()