Lines Matching +full:lock +full:- +full:regions

7  * SPDX-License-Identifier: Apache-2.0
44 * - simple rng without hardware fifo and no DMA.
45 * - Variable delay between two consecutive random numbers
74 (CONFIG_ENTROPY_STM32_ISR_POOL_SIZE - 1)) == 0,
78 (CONFIG_ENTROPY_STM32_THR_POOL_SIZE - 1)) == 0,
110 struct entropy_stm32_rng_dev_data *dev_data = dev->data; in entropy_stm32_suspend()
111 const struct entropy_stm32_rng_dev_cfg *dev_cfg = dev->config; in entropy_stm32_suspend()
112 RNG_TypeDef *rng = dev_data->rng; in entropy_stm32_suspend()
128 if (clock_control_get_rate(dev_data->clock, in entropy_stm32_suspend()
129 (clock_control_subsys_t) &dev_cfg->pclken[0], in entropy_stm32_suspend()
131 return -EIO; in entropy_stm32_suspend()
136 for (int i = wait_cycles; i >= 0; i--) { in entropy_stm32_suspend()
140 res = clock_control_off(dev_data->clock, in entropy_stm32_suspend()
141 (clock_control_subsys_t)&dev_cfg->pclken[0]); in entropy_stm32_suspend()
153 struct entropy_stm32_rng_dev_data *dev_data = dev->data; in entropy_stm32_resume()
154 const struct entropy_stm32_rng_dev_cfg *dev_cfg = dev->config; in entropy_stm32_resume()
155 RNG_TypeDef *rng = dev_data->rng; in entropy_stm32_resume()
158 res = clock_control_on(dev_data->clock, in entropy_stm32_resume()
159 (clock_control_subsys_t)&dev_cfg->pclken[0]); in entropy_stm32_resume()
179 * The nist-config is direclty copied from the DTS. in configure_rng()
183 cur_nist_cfg = READ_BIT(rng->CR, in configure_rng()
188 /* For STM32U5 series, the ARDIS bit7 is considered in the nist-config */ in configure_rng()
198 MODIFY_REG(rng->CR, cur_nist_cfg, (desired_nist_cfg | RNG_CR_CONDRST)); in configure_rng()
222 /* Lock the RNG to prevent concurrent access */ in acquire_rng()
253 /* SOCS w/ soft-reset support: execute the reset */
269 return -ETIMEDOUT; in recover_seed_error()
277 /* SOCS w/o soft-reset support: flush pipeline */
287 return -EIO; in recover_seed_error()
296 int retval = -EAGAIN; in random_byte_get()
312 retval = -EIO; in random_byte_get()
318 retval = -EIO; in random_byte_get()
327 retval = -EAGAIN; in random_byte_get()
361 * RNG event will set the Cortex-M single-bit event register in generate_from_isr()
374 * SEV-On-Pend feature must be enabled (enabled in generate_from_isr()
393 buf[--remaining_len] = byte; in generate_from_isr()
406 /* In non-blocking mode, return immediately if the RNG is not available */ in start_pool_filling()
409 return -EAGAIN; in start_pool_filling()
449 uint32_t last = rngp->last; in rng_pool_get()
450 uint32_t mask = rngp->mask; in rng_pool_get()
457 first = rngp->first_alloc; in rng_pool_get()
460 * The other_read_in_progress is non-zero if rngp->first_read != first, in rng_pool_get()
461 * which means that lower-priority code (which was interrupted by this in rng_pool_get()
464 other_read_in_progress = (rngp->first_read ^ first); in rng_pool_get()
466 available = (last - first) & mask; in rng_pool_get()
475 rngp->first_alloc = (first + len) & mask; in rng_pool_get()
478 while (likely(len--)) { in rng_pool_get()
479 *dst++ = rngp->buffer[first]; in rng_pool_get()
485 * to signal that all allocated regions are now read and could be in rng_pool_get()
490 rngp->first_read = rngp->first_alloc; in rng_pool_get()
494 len = dst - buf; in rng_pool_get()
495 available = available - len; in rng_pool_get()
496 if (available <= rngp->threshold) { in rng_pool_get()
514 uint8_t first = rngp->first_read; in rng_pool_put()
515 uint8_t last = rngp->last; in rng_pool_put()
516 uint8_t mask = rngp->mask; in rng_pool_put()
519 if (((last - first) & mask) == mask) { in rng_pool_put()
520 return -ENOBUFS; in rng_pool_put()
523 rngp->buffer[last] = byte; in rng_pool_put()
524 rngp->last = (last + 1) & mask; in rng_pool_put()
532 rngp->first_alloc = 0U; in rng_pool_init()
533 rngp->first_read = 0U; in rng_pool_init()
534 rngp->last = 0U; in rng_pool_init()
535 rngp->mask = size - 1; in rng_pool_init()
536 rngp->threshold = threshold; in rng_pool_init()
575 __ASSERT_NO_MSG(&entropy_stm32_rng_data == dev->data); in entropy_stm32_rng_get_entropy()
592 len -= bytes; in entropy_stm32_rng_get_entropy()
607 __ASSERT_NO_MSG(&entropy_stm32_rng_data == dev->data); in entropy_stm32_rng_get_entropy_isr()
634 /* Restore the state of the RNG lock and IRQ */ in entropy_stm32_rng_get_entropy_isr()
655 dev_data = dev->data; in entropy_stm32_rng_init()
656 dev_cfg = dev->config; in entropy_stm32_rng_init()
661 dev_data->clock = DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE); in entropy_stm32_rng_init()
663 if (!device_is_ready(dev_data->clock)) { in entropy_stm32_rng_init()
664 return -ENODEV; in entropy_stm32_rng_init()
667 res = clock_control_on(dev_data->clock, in entropy_stm32_rng_init()
668 (clock_control_subsys_t)&dev_cfg->pclken[0]); in entropy_stm32_rng_init()
673 res = clock_control_configure(dev_data->clock, in entropy_stm32_rng_init()
674 (clock_control_subsys_t)&dev_cfg->pclken[1], in entropy_stm32_rng_init()
680 k_sem_init(&dev_data->sem_lock, 1, 1); in entropy_stm32_rng_init()
683 k_sem_init(&dev_data->sem_sync, 0, 1); in entropy_stm32_rng_init()
685 k_work_init(&dev_data->filling_work, pool_filling_work_handler); in entropy_stm32_rng_init()
687 rng_pool_init((struct rng_pool *)(dev_data->thr), in entropy_stm32_rng_init()
690 rng_pool_init((struct rng_pool *)(dev_data->isr), in entropy_stm32_rng_init()
697 /* For multi-core MCUs, RNG configuration is automatically performed in entropy_stm32_rng_init()
712 struct entropy_stm32_rng_dev_data *dev_data = dev->data; in entropy_stm32_rng_pm_action()
722 /* Lock to Prevent concurrent access with PM */ in entropy_stm32_rng_pm_action()
733 LL_RNG_SetHealthConfig(dev_data->rng, DT_INST_PROP(0, health_test_magic)); in entropy_stm32_rng_pm_action()
735 if (LL_RNG_GetHealthConfig(dev_data->rng) != in entropy_stm32_rng_pm_action()
741 /* Lock to Prevent concurrent access with PM */ in entropy_stm32_rng_pm_action()
759 return -ENOTSUP; in entropy_stm32_rng_pm_action()