Lines Matching +full:tx +full:- +full:dma +full:- +full:channel

1 # Xilinx AXI DMA configuration options
4 # SPDX-License-Identifier: Apache-2.0
7 	bool "Xilinx AXI DMA LogiCORE IP driver"
11 	  DMA driver for Xilinx AXI DMAs, usually found on FPGAs.
15 	bool "Disable data cache while accessing Scatter-Gather Descriptors."
19 		Disable dcache while operating on Scatter-Gather descriptors.
20 		This allows the DMA to be used on architectures that do not provide
21 		coherency for DMA accesses. If you are unsure whether you need this feature,
25 	int "Number of transfer descriptors allocated for transmission (TX)."
29 		The Xilinx AXI DMA uses a ring of in-memory DMA descriptors which reference
39 		The AXI DMA driver currently allocates a single DMA descriptor for each RX transfer,
43 	prompt "IRQs to lock when manipulating per-channel data structures during dma_start."
50 		Lock all interrupts (including, e.g., timers and scheduler) when modifying channel data
52 		This is required when calling dma_start outside of the TX/RX callbacks.
56 	bool "Lock TX and RX IRQs"
58 		Lock all interrupts of this DMA device when modifying channel data during dma_start.
59 		This is only safe when dma_start is only called from the TX/RX callbacks (and possibly
60 		once directly after initialization of the DMA).
63 	bool "Lock IRQs of the DMA channel"
65 		Only lock the interrupt of the DMA channel whose data are to be modified during dma_start.
67 		registered for the same channel.
72 	int "Period of the timer used for polling the DMA in milliseconds"
76 		On certain platforms (e.g., RISC-V), the DMA driver can sometimes miss interrupts.
77 		This can cause the DMA driver to stop processing completed transactions.
78 		In order to prevent this, the DMA driver periodically polls the DMA's registers and
82 		worst-case latency.
101 		This is useful in conjunction with DMA_XILINX_AXI_DMA_INTERRUPT_THRESHOLD - the DMA