Lines Matching refs:bclk_rate
33 uint32_t bclk_rate, bool variable_hclk, in esai_get_clock_rate_config() argument
45 if (!extal_rate || !hclk_rate || !bclk_rate) { in esai_get_clock_rate_config()
55 if (bclk_rate > extal_rate) { in esai_get_clock_rate_config()
60 if (DIV_ROUND_UP(extal_rate, bclk_rate) > 2 * 8 * 256 * 16) { in esai_get_clock_rate_config()
62 bclk_rate, extal_rate); in esai_get_clock_rate_config()
67 if (DIV_ROUND_UP(extal_rate / 2, bclk_rate) == 1) { in esai_get_clock_rate_config()
126 hclk_div_ratio = DIV_ROUND_UP(extal_rate, bclk_rate); in esai_get_clock_rate_config()
132 hclk_div_ratio = DIV_ROUND_UP(extal_rate, bclk_rate); in esai_get_clock_rate_config()
143 hclk_div_ratio = DIV_ROUND_UP(extal_rate / i, bclk_rate); in esai_get_clock_rate_config()
144 bclk_div_ratio = DIV_ROUND_UP(extal_rate / hclk_div_ratio, bclk_rate); in esai_get_clock_rate_config()
157 bclk_rate, extal_rate); in esai_get_clock_rate_config()
162 bclk_div_ratio = DIV_ROUND_UP(extal_rate, bclk_rate); in esai_get_clock_rate_config()
166 bclk_rate, extal_rate); in esai_get_clock_rate_config()
471 bespoke->bclk_rate, in esai_config_set()
481 bespoke->bclk_rate, in esai_config_set()