35 				      struct esai_transceiver_config *cfg)  in esai_get_clock_rate_config()  argument
40 	if (!cfg) {  in esai_get_clock_rate_config()
87 			cfg->hclk_bypass = true;  in esai_get_clock_rate_config()
97 				cfg->hclk_prescaler_en = true;  in esai_get_clock_rate_config()
113 	cfg->hclk_div_ratio = hclk_div_ratio;  in esai_get_clock_rate_config()
122 	if (variable_hclk || cfg->hclk_bypass) {  in esai_get_clock_rate_config()
131 			cfg->hclk_prescaler_en = true;  in esai_get_clock_rate_config()
137 			cfg->bclk_div_ratio = 1;  in esai_get_clock_rate_config()
138 			cfg->hclk_div_ratio = hclk_div_ratio;  in esai_get_clock_rate_config()
148 				cfg->bclk_div_ratio = bclk_div_ratio;  in esai_get_clock_rate_config()
149 				cfg->hclk_div_ratio = hclk_div_ratio;  in esai_get_clock_rate_config()
171 	cfg->bclk_div_ratio = bclk_div_ratio;  in esai_get_clock_rate_config()
172 	cfg->hclk_div_ratio = hclk_div_ratio;  in esai_get_clock_rate_config()
177 static int esai_get_clk_provider_config(const struct dai_config *cfg,  in esai_get_clk_provider_config()  argument
180 	switch (cfg->format & DAI_FORMAT_CLOCK_PROVIDER_MASK) {  in esai_get_clk_provider_config()
190 			cfg->format & DAI_FORMAT_CLOCK_PROVIDER_MASK);  in esai_get_clk_provider_config()
197 static int esai_get_clk_inversion_config(const struct dai_config *cfg,  in esai_get_clk_inversion_config()  argument
200 	switch (cfg->format & DAI_FORMAT_CLOCK_INVERSION_MASK) {  in esai_get_clk_inversion_config()
216 			cfg->format & DAI_FORMAT_CLOCK_INVERSION_MASK);  in esai_get_clk_inversion_config()
223 static int esai_get_proto_config(const struct dai_config *cfg,  in esai_get_proto_config()  argument
226 	switch (cfg->format & DAI_FORMAT_PROTOCOL_MASK) {  in esai_get_proto_config()
237 			cfg->format & DAI_FORMAT_PROTOCOL_MASK);  in esai_get_proto_config()
244 				struct esai_transceiver_config *cfg)  in esai_get_slot_format()  argument
253 	cfg->slot_format = ESAI_SLOT_FORMAT(slot_width, word_width);  in esai_get_slot_format()
258 static void esai_get_xceiver_default_config(struct esai_transceiver_config *cfg)  in esai_get_xceiver_default_config()  argument
260 	memset(cfg, 0, sizeof(*cfg));  in esai_get_xceiver_default_config()
262 	cfg->hclk_prescaler_en = false;  in esai_get_xceiver_default_config()
263 	cfg->hclk_div_ratio = 1;  in esai_get_xceiver_default_config()
264 	cfg->bclk_div_ratio = 1;  in esai_get_xceiver_default_config()
265 	cfg->hclk_bypass = false;  in esai_get_xceiver_default_config()
267 	cfg->hclk_src = kESAI_HckSourceExternal;  in esai_get_xceiver_default_config()
268 	cfg->hclk_dir = kESAI_ClockOutput;  in esai_get_xceiver_default_config()
269 	cfg->hclk_polarity = kESAI_ClockActiveHigh;  in esai_get_xceiver_default_config()
271 	cfg->bclk_dir = kESAI_ClockOutput;  in esai_get_xceiver_default_config()
272 	cfg->bclk_polarity = kESAI_ClockActiveHigh;  in esai_get_xceiver_default_config()
274 	cfg->fsync_dir = kESAI_ClockOutput;  in esai_get_xceiver_default_config()
275 	cfg->fsync_polarity = kESAI_ClockActiveHigh;  in esai_get_xceiver_default_config()
277 	cfg->fsync_is_bit_wide = false;  in esai_get_xceiver_default_config()
278 	cfg->zero_pad_en = true;  in esai_get_xceiver_default_config()
279 	cfg->fsync_early = true;  in esai_get_xceiver_default_config()
281 	cfg->mode = kESAI_NetworkMode;  in esai_get_xceiver_default_config()
282 	cfg->data_order = kESAI_ShifterMSB;  in esai_get_xceiver_default_config()
283 	cfg->data_left_aligned = true;  in esai_get_xceiver_default_config()
288 			       struct esai_transceiver_config *cfg)  in esai_commit_config()  argument
297 		base->TCCR |= ESAI_TCCR_THCKD(cfg->hclk_dir) |  in esai_commit_config()
298 			ESAI_TCCR_TFSD(cfg->fsync_dir) |  in esai_commit_config()
299 			ESAI_TCCR_TCKD(cfg->bclk_dir) |  in esai_commit_config()
300 			ESAI_TCCR_THCKP(cfg->hclk_polarity) |  in esai_commit_config()
301 			ESAI_TCCR_TFSP(cfg->fsync_polarity) |  in esai_commit_config()
302 			ESAI_TCCR_TCKP(cfg->bclk_polarity) |  in esai_commit_config()
303 			ESAI_TCCR_TFP(cfg->bclk_div_ratio - 1) |  in esai_commit_config()
304 			ESAI_TCCR_TDC(cfg->fsync_div - 1) |  in esai_commit_config()
305 			ESAI_TCCR_TPSR(!cfg->hclk_prescaler_en) |  in esai_commit_config()
306 			ESAI_TCCR_TPM(cfg->hclk_div_ratio - 1);  in esai_commit_config()
312 		base->TCR |= ESAI_TCR_PADC(cfg->zero_pad_en) |  in esai_commit_config()
313 			ESAI_TCR_TFSR(cfg->fsync_early) |  in esai_commit_config()
314 			ESAI_TCR_TFSL(cfg->fsync_is_bit_wide) |  in esai_commit_config()
315 			ESAI_TCR_TSWS(cfg->slot_format) |  in esai_commit_config()
316 			ESAI_TCR_TMOD(cfg->mode) |  in esai_commit_config()
317 			ESAI_TCR_TWA(!cfg->data_left_aligned) |  in esai_commit_config()
318 			ESAI_TCR_TSHFD(cfg->data_order);  in esai_commit_config()
323 		base->ECR |= ESAI_ECR_ETI(cfg->hclk_src) |  in esai_commit_config()
324 			ESAI_ECR_ETO(cfg->hclk_bypass);  in esai_commit_config()
327 		base->TFCR |= ESAI_TFCR_TFWM(cfg->watermark) |  in esai_commit_config()
328 			ESAI_TFCR_TWA(cfg->word_alignment);  in esai_commit_config()
330 		ESAI_TxSetSlotMask(base, cfg->slot_mask);  in esai_commit_config()
338 		base->RCCR |= ESAI_RCCR_RHCKD(cfg->hclk_dir) |  in esai_commit_config()
339 			ESAI_RCCR_RFSD(cfg->fsync_dir) |  in esai_commit_config()
340 			ESAI_RCCR_RCKD(cfg->bclk_dir) |  in esai_commit_config()
341 			ESAI_RCCR_RHCKP(cfg->hclk_polarity) |  in esai_commit_config()
342 			ESAI_RCCR_RFSP(cfg->fsync_polarity) |  in esai_commit_config()
343 			ESAI_RCCR_RCKP(cfg->bclk_polarity) |  in esai_commit_config()
344 			ESAI_RCCR_RFP(cfg->bclk_div_ratio - 1) |  in esai_commit_config()
345 			ESAI_RCCR_RDC(cfg->fsync_div - 1) |  in esai_commit_config()
346 			ESAI_RCCR_RPSR(!cfg->hclk_prescaler_en) |  in esai_commit_config()
347 			ESAI_RCCR_RPM(cfg->hclk_div_ratio - 1);  in esai_commit_config()
353 		base->RCR |= ESAI_RCR_RFSR(cfg->fsync_early) |  in esai_commit_config()
354 			ESAI_RCR_RFSL(cfg->fsync_is_bit_wide) |  in esai_commit_config()
355 			ESAI_RCR_RSWS(cfg->slot_format) |  in esai_commit_config()
356 			ESAI_RCR_RMOD(cfg->mode) |  in esai_commit_config()
357 			ESAI_RCR_RWA(!cfg->data_left_aligned) |  in esai_commit_config()
358 			ESAI_RCR_RSHFD(cfg->data_order);  in esai_commit_config()
363 		base->ECR |= ESAI_ECR_ERI(cfg->hclk_src) |  in esai_commit_config()
364 			ESAI_ECR_ERO(cfg->hclk_bypass);  in esai_commit_config()
367 		base->RFCR |= ESAI_RFCR_RFWM(cfg->watermark) |  in esai_commit_config()
368 			ESAI_RFCR_RWA(cfg->word_alignment);  in esai_commit_config()
370 		EASI_RxSetSlotMask(base, cfg->slot_mask);  in esai_commit_config()
375 			   const struct dai_config *cfg,  in esai_config_set()  argument
386 	if (!cfg || !bespoke_data) {  in esai_config_set()
390 	if (cfg->type != DAI_IMX_ESAI) {  in esai_config_set()
391 		LOG_ERR("wrong DAI type: %d", cfg->type);  in esai_config_set()
433 	ret = esai_get_clk_provider_config(cfg, &tx_config);  in esai_config_set()
439 	ret = esai_get_proto_config(cfg, &tx_config);  in esai_config_set()
445 	ret = esai_get_clk_inversion_config(cfg, &tx_config);  in esai_config_set()
524 	data->cfg.rate = bespoke->fsync_rate;  in esai_config_set()
525 	data->cfg.channels = bespoke->tdm_slots;  in esai_config_set()
533 			   struct dai_config *cfg,  in esai_config_get()  argument
538 	if (!cfg) {  in esai_config_get()
542 	memcpy(cfg, &data->cfg, sizeof(*cfg));  in esai_config_get()
642 	const struct esai_config *cfg = dev->config;  in esai_get_properties()  local
646 		return cfg->rx_props;  in esai_get_properties()
648 		return cfg->tx_props;  in esai_get_properties()
678 	const struct esai_config *cfg;  in esai_init()  local
682 	cfg = dev->config;  in esai_init()
685 	device_map(&data->regmap, cfg->regmap_phys, cfg->regmap_size, K_MEM_CACHE_NONE);  in esai_init()
687 	ret = esai_parse_pinmodes(cfg, data);  in esai_init()
755 	.cfg.type = DAI_IMX_ESAI,					\
756 	.cfg.dai_index = DT_INST_PROP_OR(inst, dai_index, 0),		\