57 #define CLK_SRC_IS(clk, src)                                                                       \  argument
58 	DT_SAME_NODE(DT_CLOCKS_CTLR_BY_IDX(DT_INST_CLOCKS_CTLR_BY_NAME(0, clk), 0),                \
72 #define CLOCK_FREQ(clk)     _CONCAT(CLOCK_FREQ_, clk)  argument
73 #define SRC_CLOCK(clk)      DT_STRING_TOKEN_BY_IDX(DT_INST_CLOCKS_CTLR_BY_NAME(0, clk),            \  argument
75 #define SRC_CLOCK_FREQ(clk) _CONCAT(CLOCK_FREQ_, SRC_CLOCK(clk))  argument
100 #define CLOCK_AUX_SOURCE(clk) _CONCAT(_CONCAT(AUXSTEM_, clk), _CONCAT(AUXSRC_, SRC_CLOCK(clk)))  argument
175 	enum rpi_pico_clkid clk;  member
331 		clock_hw_t *clock_hw = &config->clocks_regs->clk[id];  in rpi_pico_get_clock_src()
344 		clock_hw_t *clock_hw = &clocks_hw->clk[id];  in rpi_pico_get_clock_src()
367 		clock_hw_t *clock_hw = &clocks_hw->clk[id];  in rpi_pico_get_clock_src()
389 		clock_hw_t *clock_hw = &clocks_hw->clk[id];  in rpi_pico_get_clock_src()
412 		clock_hw_t *clock_hw = &clocks_hw->clk[id];  in rpi_pico_get_clock_src()
454 		clock_hw_t *clock_hw = &config->clocks_regs->clk[id];  in rpi_pico_is_clock_enabled()
505 		clock_hw_t *clock_hw = &config->clocks_regs->clk[id];  in rpi_pico_calc_clock_freq()
556 		hw_set_bits(&config->clocks_regs->clk[clkid].ctrl, CTRL_ENABLE_BITS);  in clock_control_rpi_pico_on()
579 		hw_clear_bits(&config->clocks_regs->clk[clkid].ctrl, CTRL_ENABLE_BITS);  in clock_control_rpi_pico_off()
644 		target = tuples[checked_idx++].clk;  in rpi_pico_clkid_tuple_reorder_by_dependencies()
691 	clocks_hw->clk[RPI_PICO_CLKID_CLK_SYS].ctrl &= ~CTRL_SRC_BITS;  in clock_control_rpi_pico_init()
692 	while (clocks_hw->clk[RPI_PICO_CLKID_CLK_SYS].selected != 0x1) {  in clock_control_rpi_pico_init()
695 	clocks_hw->clk[RPI_PICO_CLKID_CLK_REF].ctrl &= ~CTRL_SRC_BITS;  in clock_control_rpi_pico_init()
696 	while (clocks_hw->clk[RPI_PICO_CLKID_CLK_REF].selected != 0x1) {  in clock_control_rpi_pico_init()
710 		if (tuples[i].clk < 0 || tuples[i].clk >= RPI_PICO_CLOCK_COUNT) {  in clock_control_rpi_pico_init()
714 		if (!(clock_configure(tuples[i].clk, config->clocks_data[tuples[i].clk].source,  in clock_control_rpi_pico_init()
715 				      config->clocks_data[tuples[i].clk].aux_source,  in clock_control_rpi_pico_init()
716 				      config->clocks_data[tuples[i].clk].source_rate,  in clock_control_rpi_pico_init()
717 				      config->clocks_data[tuples[i].clk].rate))) {  in clock_control_rpi_pico_init()
722 	hw_clear_bits(&clocks_regs->clk[rpi_pico_clkid_clk_gpout0].ctrl, CTRL_ENABLE_BITS);  in clock_control_rpi_pico_init()
723 	hw_clear_bits(&clocks_regs->clk[rpi_pico_clkid_clk_gpout1].ctrl, CTRL_ENABLE_BITS);  in clock_control_rpi_pico_init()
724 	hw_clear_bits(&clocks_regs->clk[rpi_pico_clkid_clk_gpout2].ctrl, CTRL_ENABLE_BITS);  in clock_control_rpi_pico_init()
725 	hw_clear_bits(&clocks_regs->clk[rpi_pico_clkid_clk_gpout3].ctrl, CTRL_ENABLE_BITS);  in clock_control_rpi_pico_init()