Lines Matching full:khz
30 * 32KHz period counter minimum for pass/fail: 16-bit
31 * 32KHz period counter maximum for pass/fail: 16-bit
32 * 32KHz duty cycle variation max for pass/fail: 16-bit
33 * 32KHz valid count minimum: 8-bit
37 * One 32KHz clock pulse = 1464.84 48 MHz counts.
156 #define XEC_CC_VBATR_CS_XTAL_SE BIT(9) /* crystal XTAL2 used as 32KHz input */
162 /* MEC172x Select source of peripheral 32KHz clock */
190 uint16_t period_min; /* mix and max 32KHz period range */
193 uint8_t xtal_se; /* External 32KHz square wave on XTAL2 pin */
194 uint8_t max_dc_va; /* 32KHz monitor maximum duty cycle variation */
195 uint8_t min_valid; /* minimum number of valid consecutive 32KHz pulses */
221 * its reference clock. Available peripheral timers using 32KHz are:
227 * one 32KHz cycle to move pre-load into count register.
229 * Hibernation timer is using the chosen 32KHz source. If the external 32KHz source
267 /* MEC15xx uses the same 32KHz source for both PLL and Peripheral 32K clock domains.
269 * If XTAL is selected (parallel) or single-ended the external 32KHz MUST stay on
390 /* caller has enabled internal silicon 32 KHz oscillator */
444 * Start external 32 KHz crystal.
547 * The source must be a stable 32 KHz input: internal silicon oscillator,
606 /* two bit field in PCR VTR 32KHz source register */
631 /* two bit field in VBAT source 32KHz register */
654 * MEC172x has two 32 KHz clock domains
655 * PLL domain: 32 KHz clock input for PLL to produce 96 MHz and 48 MHz clocks
656 * Peripheral domain: 32 KHz clock for subset of peripherals.
657 * Each domain 32 KHz clock input can be from one of the following sources:
665 * If no VBAT reset occurs the VBAT 32 KHz source register maintains its state.
687 /* Default to 32KHz Silicon OSC for PLL and peripherals */ in soc_clk32_init()
697 /* If crystal input required, enable and check. Single-ended 32KHz square wave in soc_clk32_init()
900 * turned off. Exception is 32 KHz clock.
936 * Two main clock domains: PLL and Peripheral-32K. Each domain's 32 KHz source
940 * external 32 KHz 50% duty cycle waveform on 32KHZ_IN pin.