Lines Matching +full:33 +full:mhz

36  * HW count resolution is 48 MHz.
37  * One 32KHz clock pulse = 1464.84 48 MHz counts.
53 #define HIBTIMER_MS_TO_CNT(x)		((uint32_t)(x) * 33U)
191 	uint16_t period_max; /* monitor values in units of 48MHz (20.8 ns) */
655  *   PLL domain: 32 KHz clock input for PLL to produce 96 MHz and 48 MHz clocks
921 	return MHZ(48);  in get_turbo_clock()
927 		return MHZ(96);  in get_turbo_clock()
930 	return MHZ(48);  in get_turbo_clock()
941  * PLL domain supplies 96 MHz, 48 MHz, and other high speed clocks to all
943  * is derived from the 48 MHz produced by the PLL.
944  *   ARM Cortex-M4 core input: 96MHz
945  *   AHB clock input: 48 MHz
946  *   Fast AHB peripherals: 96 MHz internal and 48 MHz AHB interface.
962 	uint32_t ahb_clock = MHZ(48);  in xec_clock_control_get_subsys_rate()