274 				   uint32_t clock_div)  in _configure_clk_hf()  argument
285 		rslt = cyhal_clock_set_divider(clock_obj, clock_div);  in _configure_clk_hf()
390 	uint32 clock_div;  in clock_control_infineon_cat1_init()  local
501 	clock_div = DT_PROP(DT_NODELABEL(clk_hf0), clock_div);  in clock_control_infineon_cat1_init()
503 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[0], clock_div)) {  in clock_control_infineon_cat1_init()
512 	clock_div = DT_PROP(DT_NODELABEL(clk_hf1), clock_div);  in clock_control_infineon_cat1_init()
514 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[1], clock_div)) {  in clock_control_infineon_cat1_init()
523 	clock_div = DT_PROP(DT_NODELABEL(clk_hf2), clock_div);  in clock_control_infineon_cat1_init()
525 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[2], clock_div)) {  in clock_control_infineon_cat1_init()
534 	clock_div = DT_PROP(DT_NODELABEL(clk_hf3), clock_div);  in clock_control_infineon_cat1_init()
536 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[3], clock_div)) {  in clock_control_infineon_cat1_init()
545 	clock_div = DT_PROP(DT_NODELABEL(clk_hf4), clock_div);  in clock_control_infineon_cat1_init()
547 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[4], clock_div)) {  in clock_control_infineon_cat1_init()
556 	clock_div = DT_PROP(DT_NODELABEL(clk_hf5), clock_div);  in clock_control_infineon_cat1_init()
558 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[5], clock_div)) {  in clock_control_infineon_cat1_init()
567 	clock_div = DT_PROP(DT_NODELABEL(clk_hf6), clock_div);  in clock_control_infineon_cat1_init()
569 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[6], clock_div)) {  in clock_control_infineon_cat1_init()
578 	clock_div = DT_PROP(DT_NODELABEL(clk_hf7), clock_div);  in clock_control_infineon_cat1_init()
580 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[7], clock_div)) {  in clock_control_infineon_cat1_init()
589 	clock_div = DT_PROP(DT_NODELABEL(clk_hf8), clock_div);  in clock_control_infineon_cat1_init()
591 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[8], clock_div)) {  in clock_control_infineon_cat1_init()
600 	clock_div = DT_PROP(DT_NODELABEL(clk_hf9), clock_div);  in clock_control_infineon_cat1_init()
602 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[9], clock_div)) {  in clock_control_infineon_cat1_init()
611 	clock_div = DT_PROP(DT_NODELABEL(clk_hf10), clock_div);  in clock_control_infineon_cat1_init()
613 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[10], clock_div)) {  in clock_control_infineon_cat1_init()
622 	clock_div = DT_PROP(DT_NODELABEL(clk_hf11), clock_div);  in clock_control_infineon_cat1_init()
624 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[11], clock_div)) {  in clock_control_infineon_cat1_init()
633 	clock_div = DT_PROP(DT_NODELABEL(clk_hf12), clock_div);  in clock_control_infineon_cat1_init()
635 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[12], clock_div)) {  in clock_control_infineon_cat1_init()
644 	clock_div = DT_PROP(DT_NODELABEL(clk_hf13), clock_div);  in clock_control_infineon_cat1_init()
646 	if (_configure_clk_hf(clock_obj, clock_source_obj, &CYHAL_CLOCK_HF[13], clock_div)) {  in clock_control_infineon_cat1_init()
654 	clock_div = DT_PROP(DT_NODELABEL(clk_fast), clock_div);  in clock_control_infineon_cat1_init()
658 		rslt = cyhal_clock_set_divider(clock_obj, clock_div);  in clock_control_infineon_cat1_init()
668 	clock_div = DT_PROP(DT_NODELABEL(clk_peri), clock_div);  in clock_control_infineon_cat1_init()
672 		rslt = cyhal_clock_set_divider(clock_obj, clock_div);  in clock_control_infineon_cat1_init()
682 	clock_div = DT_PROP(DT_NODELABEL(clk_slow), clock_div);  in clock_control_infineon_cat1_init()
686 		rslt = cyhal_clock_set_divider(clock_obj, clock_div);  in clock_control_infineon_cat1_init()