Lines Matching +full:esp32 +full:- +full:s2

5  * SPDX-License-Identifier: Apache-2.0
23 * Newer ESP32-series MCUs like ESP32-C3 and ESP32-S2 have some slightly different registers
24 * compared to the original ESP32, which is fully compatible with the SJA1000 controller.
56 * - TWAI_STATUS_REG has new bit 8: TWAI_MISS_ST
57 * - TWAI_INT_RAW_REG has new bit 8: TWAI_BUS_STATE_INT_ST
58 * - TWAI_INT_ENA_REG has new bit 8: TWAI_BUS_STATE_INT_ENA
77 /* 32-bit variant of output clock divider register required for non-ESP32 MCUs */
84 const struct can_sja1000_config *sja1000_config = dev->config; in can_esp32_twai_read_reg()
85 const struct can_esp32_twai_config *twai_config = sja1000_config->custom; in can_esp32_twai_read_reg()
86 mm_reg_t addr = twai_config->base + reg * sizeof(uint32_t); in can_esp32_twai_read_reg()
93 const struct can_sja1000_config *sja1000_config = dev->config; in can_esp32_twai_write_reg()
94 const struct can_esp32_twai_config *twai_config = sja1000_config->custom; in can_esp32_twai_write_reg()
95 mm_reg_t addr = twai_config->base + reg * sizeof(uint32_t); in can_esp32_twai_write_reg()
103 * Required for newer ESP32-series MCUs which violate the original SJA1000 8-bit register size.
107 const struct can_sja1000_config *sja1000_config = dev->config; in can_esp32_twai_write_reg32()
108 const struct can_esp32_twai_config *twai_config = sja1000_config->custom; in can_esp32_twai_write_reg32()
109 mm_reg_t addr = twai_config->base + reg * sizeof(uint32_t); in can_esp32_twai_write_reg32()
120 struct can_sja1000_data *data = dev->data; in can_esp32_twai_set_timing()
124 if (data->common.started) { in can_esp32_twai_set_timing()
125 return -EBUSY; in can_esp32_twai_set_timing()
128 k_mutex_lock(&data->mod_lock, K_FOREVER); in can_esp32_twai_set_timing()
130 btr0 = TWAI_BAUD_PRESC_PREP(timing->prescaler - 1) | in can_esp32_twai_set_timing()
131 TWAI_SYNC_JUMP_WIDTH_PREP(timing->sjw - 1); in can_esp32_twai_set_timing()
132 btr1 = TWAI_TIME_SEG1_PREP(timing->phase_seg1 - 1) | in can_esp32_twai_set_timing()
133 TWAI_TIME_SEG2_PREP(timing->phase_seg2 - 1); in can_esp32_twai_set_timing()
135 if ((data->common.mode & CAN_MODE_3_SAMPLES) != 0) { in can_esp32_twai_set_timing()
142 k_mutex_unlock(&data->mod_lock); in can_esp32_twai_set_timing()
168 const struct can_sja1000_config *sja1000_config = dev->config; in can_esp32_twai_init()
169 const struct can_esp32_twai_config *twai_config = sja1000_config->custom; in can_esp32_twai_init()
172 if (!device_is_ready(twai_config->clock_dev)) { in can_esp32_twai_init()
174 return -ENODEV; in can_esp32_twai_init()
177 err = pinctrl_apply_state(twai_config->pcfg, PINCTRL_STATE_DEFAULT); in can_esp32_twai_init()
183 err = clock_control_on(twai_config->clock_dev, twai_config->clock_subsys); in can_esp32_twai_init()
197 * TWAI_CLOCK_DIVIDER_REG is incompatible with CAN_SJA1000_CDR for non-ESP32 MCUs in can_esp32_twai_init()
198 * - TWAI_CD has length of 8 bits instead of 3 bits in can_esp32_twai_init()
199 * - TWAI_CLOCK_OFF at BIT(8) instead of BIT(3) in can_esp32_twai_init()
200 * - TWAI_EXT_MODE bit missing (always "extended" = PeliCAN mode) in can_esp32_twai_init()
202 * Overwrite with 32-bit register variant configured via devicetree. in can_esp32_twai_init()
204 can_esp32_twai_write_reg32(dev, TWAI_CLOCK_DIVIDER_REG, twai_config->cdr32); in can_esp32_twai_init()
207 err = esp_intr_alloc(twai_config->irq_source, in can_esp32_twai_init()
208 ESP_PRIO_TO_FLAGS(twai_config->irq_priority) | in can_esp32_twai_init()
209 ESP_INT_FLAGS_CHECK(twai_config->irq_flags) | ESP_INTR_FLAG_IRAM, in can_esp32_twai_init()
243 /* larger prescaler allowed for newer ESP32-series MCUs */
267 "TWAI clkout-divider from dts invalid")
272 ((DT_INST_PROP(inst, clkout_divider)) / 2 - 1)), \