Lines Matching +full:timing +full:- +full:ext
2 * Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b3lihxq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "st,stm32h7b3i-dk";
20 zephyr,shell-uart = &usart1;
29 compatible = "gpio-leds";
41 compatible = "gpio-keys";
50 compatible = "zephyr,lvgl-pointer-input";
55 compatible = "zephyr,memory-region", "mmio-sram";
58 zephyr,memory-region = "SDRAM2";
60 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
64 compatible = "zephyr,memory-region";
66 zephyr,memory-region = "EXTMEM";
68 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
71 transceiver0: can-phy0 {
72 compatible = "microchip,mcp2562fd", "can-transceiver-gpio";
73 standby-gpios = <&gpioh 8 GPIO_ACTIVE_HIGH>;
74 max-bitrate = <5000000>;
75 #phy-cells = <0>;
79 compatible = "st,stm32-dcmi-camera-fpu-330zh";
80 #gpio-cells = <2>;
81 gpio-map-mask = <0xffffffff 0xffffffc0>;
82 gpio-map-pass-thru = <0 0x3f>;
83 gpio-map = <3 0 &gpiod 12 0>, /* I2C4_SCL */
112 clock-frequency = <DT_FREQ_M(24)>;
118 div-m = <12>;
119 mul-n = <280>;
120 div-p = <2>;
121 div-q = <7>;
122 div-r = <2>;
129 div-m = <8>;
130 mul-n = <60>;
131 div-p = <2>;
132 div-q = <2>;
133 div-r = <20>;
140 clock-frequency = <DT_FREQ_M(280)>;
150 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
151 pinctrl-names = "default";
152 current-speed = <115200>;
157 pinctrl-0 = <&uart4_tx_ph13 &uart4_rx_ph14>;
158 pinctrl-names = "default";
159 current-speed = <115200>;
164 pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pd13>;
165 pinctrl-names = "default";
166 clock-frequency = <I2C_BITRATE_FAST>;
172 int-gpios = <&gpioh 2 GPIO_ACTIVE_LOW>;
177 pinctrl-0 = <&spi2_sck_pa12 &spi2_miso_pb14 &spi2_mosi_pb15 &spi2_nss_pi0>;
178 pinctrl-names = "default";
184 pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
185 pinctrl-names = "default";
193 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
204 pinctrl-names = "default";
209 power-up-delay = <100>;
210 num-auto-refresh = <8>;
211 mode-register = <0x220>;
212 refresh-rate = <0x603>;
215 st,sdram-control = <STM32_FMC_SDRAM_NC_9
223 st,sdram-timing = <2 7 4 7 2 2 2>;
229 pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
232 pinctrl-names = "default";
233 cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
238 pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_pj2
245 pinctrl-names = "default";
246 disp-on-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>;
247 bl-ctrl-gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
248 ext-sdram = <&sdram2>;
253 pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
254 display-timings {
255 compatible = "zephyr,panel-timing";
256 de-active = <0>;
257 pixelclk-active = <0>;
258 hsync-active = <0>;
259 vsync-active = <0>;
260 hsync-len = <1>;
261 vsync-len = <10>;
262 hback-porch = <43>;
263 vback-porch = <12>;
264 hfront-porch = <8>;
265 vfront-porch = <4>;
267 def-back-color-red = <0xFF>;
268 def-back-color-green = <0xFF>;
269 def-back-color-blue = <0xFF>;
273 pinctrl-0 = <&octospim_p1_clk_pb2 &octospim_p1_ncs_pg6
279 pinctrl-names = "default";
283 mx25lm51245: ospi-nor-flash@90000000 {
284 compatible = "st,stm32-ospi-nor";
286 ospi-max-frequency = <DT_FREQ_M(50)>;
287 spi-bus-width = <OSPI_OPI_MODE>;
288 data-rate = <OSPI_DTR_TRANSFER>;
292 compatible = "fixed-partitions";
293 #address-cells = <1>;
294 #size-cells = <1>;