Lines Matching +full:standby +full:- +full:gpios

2  * Copyright (c) 2022 Byte-Lab d.o.o. <dev@byte-lab.com>
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h7b3lihxq-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 compatible = "st,stm32h7b3i-dk";
20 zephyr,shell-uart = &usart1;
29 compatible = "gpio-leds";
31 gpios = <&gpiog 11 GPIO_ACTIVE_HIGH>;
35 gpios = <&gpiog 2 GPIO_ACTIVE_HIGH>;
41 compatible = "gpio-keys";
44 gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
50 compatible = "zephyr,lvgl-pointer-input";
55 compatible = "zephyr,memory-region", "mmio-sram";
58 zephyr,memory-region = "SDRAM2";
60 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM_NOCACHE) )>;
64 compatible = "zephyr,memory-region";
66 zephyr,memory-region = "EXTMEM";
68 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
71 transceiver0: can-phy0 {
72 compatible = "microchip,mcp2562fd", "can-transceiver-gpio";
73 standby-gpios = <&gpioh 8 GPIO_ACTIVE_HIGH>;
74 max-bitrate = <5000000>;
75 #phy-cells = <0>;
90 clock-frequency = <DT_FREQ_M(24)>;
96 div-m = <12>;
97 mul-n = <280>;
98 div-p = <2>;
99 div-q = <7>;
100 div-r = <2>;
107 div-m = <8>;
108 mul-n = <60>;
109 div-p = <2>;
110 div-q = <2>;
111 div-r = <20>;
118 clock-frequency = <DT_FREQ_M(280)>;
128 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
129 pinctrl-names = "default";
130 current-speed = <115200>;
135 pinctrl-0 = <&uart4_tx_ph13 &uart4_rx_ph14>;
136 pinctrl-names = "default";
137 current-speed = <115200>;
142 pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pd13>;
143 pinctrl-names = "default";
144 clock-frequency = <I2C_BITRATE_FAST>;
150 int-gpios = <&gpioh 2 0>;
155 pinctrl-0 = <&spi2_sck_pa12 &spi2_miso_pb14 &spi2_mosi_pb15 &spi2_nss_pi0>;
156 pinctrl-names = "default";
162 pinctrl-0 = <&fdcan1_rx_pa11 &fdcan1_tx_pa12>;
163 pinctrl-names = "default";
171 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
182 pinctrl-names = "default";
187 power-up-delay = <100>;
188 num-auto-refresh = <8>;
189 mode-register = <0x220>;
190 refresh-rate = <0x603>;
193 st,sdram-control = <STM32_FMC_SDRAM_NC_9
201 st,sdram-timing = <2 7 4 7 2 2 2>;
207 pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
210 pinctrl-names = "default";
211 cd-gpios = <&gpioi 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
216 pinctrl-0 = <&ltdc_r0_pi15 &ltdc_r1_pj0 &ltdc_r2_pj1 &ltdc_r3_pj2
223 pinctrl-names = "default";
224 disp-on-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>;
225 bl-ctrl-gpios = <&gpioa 1 GPIO_ACTIVE_HIGH>;
226 ext-sdram = <&sdram2>;
231 pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
232 display-timings {
233 compatible = "zephyr,panel-timing";
234 de-active = <0>;
235 pixelclk-active = <0>;
236 hsync-active = <0>;
237 vsync-active = <0>;
238 hsync-len = <1>;
239 vsync-len = <10>;
240 hback-porch = <43>;
241 vback-porch = <12>;
242 hfront-porch = <8>;
243 vfront-porch = <4>;
245 def-back-color-red = <0xFF>;
246 def-back-color-green = <0xFF>;
247 def-back-color-blue = <0xFF>;
251 pinctrl-0 = <&octospim_p1_clk_pb2 &octospim_p1_ncs_pg6
257 pinctrl-names = "default";
261 mx25lm51245: ospi-nor-flash@90000000 {
262 compatible = "st,stm32-ospi-nor";
264 ospi-max-frequency = <DT_FREQ_M(50)>;
265 spi-bus-width = <OSPI_OPI_MODE>;
266 data-rate = <OSPI_DTR_TRANSFER>;
270 compatible = "fixed-partitions";
271 #address-cells = <1>;
272 #size-cells = <1>;