Lines Matching +full:0 +full:x90000000
29 reg = <0xd0000000 DT_SIZE_M(32)>;
36 reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
59 #phy-cells = <0>;
124 reg = <0x000ff800 DT_SIZE_K(2)>;
139 pinctrl-0 = <ð_ref_clk_pa1
151 pinctrl-0 = <ð_mdio_pa2 ð_mdc_pc1>;
154 ethernet-phy@0 {
156 reg = <0x00>;
167 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1 &fmc_nbl2_pi4 &fmc_nbl3_pi5
189 mode-register = <0x220>;
209 pinctrl-0 = <&usb_otg_hs_ulpi_ck_pa5
224 clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x06000000>,
232 clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00010000>,
234 pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
244 pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pg6
255 reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
266 partition@0 {
267 reg = <0x0 DT_SIZE_M(64)>;
274 reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
284 pinctrl-0 = <&i2c4_scl_pd12 &i2c4_sda_pd13>;