Lines Matching +full:high +full:- +full:side
7 from audio, multi-sensor support, graphics, security, video,
8 and high-speed connectivity features.
10 The board includes an STM32H747XI SoC with a high-performance DSP, Arm Cortex-M7 + Cortex-M4 MCU,
12 large set of peripherals, SMPS, and MIPI-DSI.
16 - On-board ST-LINK/V3E supporting USB reenumeration capability
17 - USB ST-LINK functions: virtual COM port, mass storage, debug port
18 - Flexible power-supply options:
20 - ST-LINK USB VBUS, USB OTG HS connector, or external sources
22 - 4” capacitive touch LCD display module with MIPI® DSI interface
23 - Ethernet compliant with IEEE802.3-2002
24 - USB OTG HS
25 - Stereo speaker outputs
26 - ST-MEMS digital microphones
27 - 2 x 512-Mbit QUAD-SPI NOR Flash memory
28 - 256-Mbit SDRAM
29 - 4 color user LEDs
30 - 1 user and reset push-button
31 - 4-direction joystick with selection button
32 - Arduino Uno V3 connectors
34 More information about the board can be found at the `STM32H747I-DISCO website`_.
37 - `STM32H747XI on www.st.com`_
38 - `STM32H747xx reference manual`_
39 - `STM32H747xx datasheet`_
46 +-----------+------------+-------------------------------------+
49 | NVIC | on-chip | nested vector interrupt controller |
50 +-----------+------------+-------------------------------------+
51 | UART | on-chip | serial port-polling; |
52 | | | serial port-interrupt |
53 +-----------+------------+-------------------------------------+
54 | PINMUX | on-chip | pinmux |
55 +-----------+------------+-------------------------------------+
56 | GPIO | on-chip | gpio |
57 +-----------+------------+-------------------------------------+
58 | FLASH | on-chip | flash memory |
59 +-----------+------------+-------------------------------------+
60 | ETHERNET | on-chip | ethernet (*) |
61 +-----------+------------+-------------------------------------+
62 | RNG | on-chip | True Random number generator |
63 +-----------+------------+-------------------------------------+
64 | FMC | on-chip | memc (SDRAM) |
65 +-----------+------------+-------------------------------------+
66 | SPI | on-chip | spi |
67 +-----------+------------+-------------------------------------+
68 | QSPI NOR | on-chip | off-chip flash |
69 +-----------+------------+-------------------------------------+
70 | SDMMC | on-chip | disk access |
71 +-----------+------------+-------------------------------------+
72 | IPM | on-chip | virtual mailbox based on HSEM |
73 +-----------+------------+-------------------------------------+
74 | DISPLAY | on-chip | MIPI DSI Host with shield (MP1166) |
76 +-----------+------------+-------------------------------------+
93 input/output, pull-up, etc.
95 For more details please refer to `STM32H747I-DISCO website`_.
98 ----------------------------------
100 - UART_1 TX/RX : PA9/PA10 (ST-Link Virtual Port Com)
101 - UART_8 TX/RX : PJ8/PJ9 (Arduino Serial)
102 - SPI_5 NSS/SCK/MISO/MOSI : PK1/PK0/PJ11/PJ10 (Arduino SPI)
103 - SDMMC_1 D0/D1/D2/D3/CK/CMD: PC8/PC9/PC10/PC11/PC12/PD2
104 - LD1 : PI12
105 - LD2 : PI13
106 - LD3 : PI14
107 - LD4 : PI15
108 - W-UP : PC13
109 - J-CENTER : PK2
110 - J-DOWN : PK3
111 - J-LEFT : PK4
112 - J-RIGHT : PK5
113 - J-UP : PK6
119 as well as by the main PLL clock. By default, the CPU1 (Cortex-M7) System clock
120 is driven by the PLL clock at 400MHz, and the CPU2 (Cortex-M4) System clock
121 is driven at 200MHz. PLL clock is feed by a 25MHz high speed external clock.
128 output is assigned to UART1 which connected to the onboard ST-LINK/V3.0. Virtual
134 **Disclaimer:** This section is mostly copy-paste of corresponding
141 - **SB21**, **SB45** and **R87** should be opened
142 - **SB22**, **SB44**, **SB17** and **SB8** should be closed
148 :alt: STM32H747I-DISCO - Ethernet modification 1 (**SB44**, **SB45**)
152 …:alt: STM32H747I-DISCO - Ethernet modification 2 (**SB21**, **R87**, **SB22**, **SB17** and **SB8*…
158 the MB1166 (B-LCD40-DSI1) display extension board can be mounted. Enable display
162 .. zephyr-app-commands::
163 :zephyr-app: samples/drivers/display
169 The shield comes in different hardware revisions, the MB1166-A09
175 mounting holes and has the format: MB1166-Axx.
183 - **Compilation**: Clock configuration is only accessible to M7 core. M4 core only
185 - **Static pre-compilation assignment**: Peripherals such as a UART are assigned in
188 - **Run time protection**: Interrupt-controller and GPIO configurations could be
195 STM32H747I-DISCO board includes an ST-LINK/V3 embedded debug tool interface.
204 Check if the board's ST-LINK V3 has the newest FW version. It can be updated
222 for both cores, so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
226 the ``--runner`` (or ``-r``) option:
228 .. code-block:: console
230 $ west flash --runner openocd
231 $ west flash --runner jlink
238 - CPU1 (Cortex-M7) boot address is set to 0x80000000 (OB: BOOT_CM7_ADD0)
239 - CPU2 (Cortex-M4) boot address is set to 0x81000000 (OB: BOOT_CM4_ADD0)
251 ---------------------------------------------
256 Here is an example for the :zephyr:code-sample:`hello_world` application.
258 .. zephyr-app-commands::
259 :zephyr-app: samples/hello_world
265 .. code-block:: console
267 $ minicom -D /dev/ttyACM0
271 .. code-block:: console
282 Here is an example for the :zephyr:code-sample:`blinky` application on M4 core.
284 .. zephyr-app-commands::
285 :zephyr-app: samples/basic/blinky
292 You can debug an application on Cortex M7 side in the usual way. Here is an example
293 for the :zephyr:code-sample:`hello_world` application.
295 .. zephyr-app-commands::
296 :zephyr-app: samples/hello_world
300 Debugging a Zephyr application on Cortex M4 side with west is currently not available.
303 .. _STM32H747I-DISCO website:
304 https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
307 …n/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mc…
316 https://www.st.com/en/development-tools/stm32cubeprog.html
319 https://os.mbed.com/teams/ST/wiki/DISCO_H747I-modifications-for-Ethernet
322 https://www.st.com/en/development-tools/stm32cubeide.html