Lines Matching +full:vfront +full:- +full:porch
5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include <st/f7/stm32f750n8hx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 model = "STMicroelectronics STM32F7508-DK";
21 zephyr,shell-uart = &usart1;
25 zephyr,flash-controller = &n25q128a1;
31 compatible = "gpio-leds";
39 compatible = "gpio-keys";
48 compatible = "zephyr,lvgl-pointer-input";
53 compatible = "zephyr,memory-region", "mmio-sram";
56 zephyr,memory-region = "SDRAM1";
57 zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>;
71 clock-frequency = <DT_FREQ_M(25)>;
76 div-m = <25>;
77 mul-n = <432>;
78 div-p = <2>;
79 div-q = <9>;
86 clock-frequency = <DT_FREQ_M(216)>;
87 ahb-prescaler = <1>;
88 apb1-prescaler = <4>;
89 apb2-prescaler = <2>;
93 pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
94 pinctrl-names = "default";
96 clock-frequency = <I2C_BITRATE_FAST>;
100 pinctrl-0 = <&i2c3_scl_ph7 &i2c3_sda_ph8>;
101 pinctrl-names = "default";
103 clock-frequency = <I2C_BITRATE_FAST>;
108 int-gpios = <&gpioi 13 0>;
113 pinctrl-0 = <&spi2_sck_pi1 &spi2_miso_pb14 &spi2_mosi_pb15>;
114 pinctrl-names = "default";
115 cs-gpios = <&gpioa 8 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
120 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>;
121 pinctrl-names = "default";
122 current-speed = <115200>;
127 pinctrl-0 = <&usart6_tx_pc6 &usart6_rx_pc7>;
128 pinctrl-names = "default";
129 current-speed = <115200>;
134 pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
135 pinctrl-names = "default";
145 pinctrl-0 = <&tim3_ch1_pb4>;
146 pinctrl-names = "default";
158 pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
161 pinctrl-names = "default";
162 cd-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
167 pinctrl-0 = <ð_mdc_pc1
176 pinctrl-names = "default";
180 pinctrl-0 = <&quadspi_clk_pb2 &quadspi_bk1_ncs_pb6
183 pinctrl-names = "default";
186 n25q128a1: qspi-nor-flash@90000000 {
187 compatible = "st,stm32-qspi-nor";
189 qspi-max-frequency = <72000000>;
193 compatible = "fixed-partitions";
194 #address-cells = <1>;
195 #size-cells = <1>;
198 label = "image-1";
211 pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
222 pinctrl-names = "default";
227 power-up-delay = <100>;
228 num-auto-refresh = <8>;
229 mode-register = <0x220>;
232 * and is calculated as ((15.625 * SDRAM_CLK_MHZ) - 20)
235 refresh-rate = <1667>;
238 st,sdram-control = <STM32_FMC_SDRAM_NC_8
246 st,sdram-timing = <2 6 4 6 2 2 2>;
252 pinctrl-0 = <<dc_r0_pi15 <dc_r1_pj0 <dc_r2_pj1 <dc_r3_pj2
259 pinctrl-names = "default";
260 disp-on-gpios = <&gpioi 12 GPIO_ACTIVE_HIGH>;
261 bl-ctrl-gpios = <&gpiok 3 GPIO_ACTIVE_HIGH>;
262 ext-sdram = <&sdram1>;
267 pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
268 display-timings {
269 compatible = "zephyr,panel-timing";
270 de-active = <0>;
271 pixelclk-active = <0>;
272 hsync-active = <0>;
273 vsync-active = <0>;
274 hsync-len = <1>;
275 vsync-len = <10>;
276 hback-porch = <43>;
277 vback-porch = <12>;
278 hfront-porch = <8>;
279 vfront-porch = <4>;
281 def-back-color-red = <0xFF>;
282 def-back-color-green = <0xFF>;
283 def-back-color-blue = <0xFF>;