Lines Matching +full:smart +full:- +full:mode
6 The NUCLEO-WL55JC STM32WL Nucleo-64 board provides an affordable and flexible
11 - STM32WL55JC microcontroller multiprotocol LPWAN dual-core 32-bit
12 (Arm® Cortex®-M4/M0+ at 48 MHz) in UFBGA73 package featuring:
14 - Ultra-low-power MCU
15 - RF transceiver (150 MHz to 960 MHz frequency range) supporting LoRa®,
17 - 256-Kbyte Flash memory and 64-Kbyte SRAM
19 - 3 user LEDs
20 - 3 user buttons and 1 reset push-button
21 - 32.768 kHz LSE crystal oscillator
22 - 32 MHz HSE on-board oscillator
23 - Board connectors:
25 - USB with Micro-B
26 - MIPI debug connector
27 - ARDUINO Uno V3 expansion connector
28 - ST morpho extension pin headers for full access to all STM32WL I/Os
30 - Delivered with SMA antenna
31 - Flexible power-supply options: ST-LINK, USB VBUS, or external sources
32 - On-board STLINK-V3 debugger/programmer with USB re-enumeration capability:
34 - Comprehensive free software libraries and examples available with the
36 - Support of a wide choice of Integrated Development Environments (IDEs)
37 including IAR Embedded Workbench®, MDK-ARM, and STM32CubeIDE
38 - Suitable for rapid prototyping of end nodes based on LoRaWAN, Sigfox, wM-Bus,
40 - Fully open hardware platform
48 The STM32WL55JC long-range wireless and ultra-low-power devices embed a powerful
49 and ultra-low-power LPWAN-compliant radio solution, enabling the following
53 - Radio
55 - Frequency range: 150 MHz to 960 MHz
56 - Modulation: LoRa®, (G)FSK, (G)MSK and BPSK
57 - RX sensitivity: –123 dBm for 2-FSK(at 1.2 Kbit/s), –148 dBm for LoRa®
59 - Transmitter high output power, programmable up to +22 dBm
60 - Transmitter low output power, programmable up to +15 dBm
61 - Compliant with the following radio frequency regulations such as
63 and the Japanese ARIB STD-T30, T-67, T-108
64 - Compatible with standardized or proprietary protocols such as LoRaWAN®,
65 Sigfox™, W-MBus and more (fully open wireless system-on-chip)
67 - Core
69 - 32-bit Arm® Cortex®-M4 CPU
71 - Adaptive real-time accelerator (ART Accelerator) allowing 0-wait-state
74 - 1.25 DMIPS/MHz (Dhrystone 2.1)
76 - 32-bit Arm®Cortex®-M0+ CPU
78 - Frequency up to 48 MHz, MPU
79 - 0.95 DMIPS/MHz (Dhrystone 2.1)
81 - Security and identification
83 - Hardware encryption AES 256-bit
84 - True random number generator (RNG)
85 - Sector protection against read/write operations (PCROP, RDP, WRP)
86 - CRC calculation unit
87 - Unique device identifier (64-bit UID compliant with IEEE 802-2001 standard)
88 - 96-bit unique die identifier
89 - Hardware public key accelerator (PKA)
90 - Key management services
91 - Secure sub-GHz MAC layer
92 - Secure firmware update (SFU)
93 - Secure firmware install (SFI)
95 - Supply and reset management
97 - High-efficiency embedded SMPS step-down converter
98 - SMPS to LDO smart switch
99 - Ultra-safe, low-power BOR (brownout reset) with 5 selectable thresholds
100 - Ultra-low-power POR/PDR
101 - Programmable voltage detector (PVD)
102 - VBAT mode with RTC and 20x32-byte backup registers
104 - Clock sources
106 - 32 MHz crystal oscillator
107 - TCXO support: programmable supply voltage
108 - 32 kHz oscillator for RTC with calibration
109 - High-speed internal 16 MHz factory trimmed RC (± 1 %)
110 - Internal low-power 32 kHz RC
111 - Internal multi-speed low-power 100 kHz to 48 MHz RC
112 - PLL for CPU, ADC and audio clocks
114 - Memories
116 - 256-Kbyte Flash memory
117 - 64-Kbyte RAM
118 - 20x32-bit backup register
119 - Bootloader supporting USART and SPI interfaces
120 - OTA (over-the-air) firmware update capable
121 - Sector protection against read/write operations
123 - Rich analog peripherals (down to 1.62 V)
125 - 12-bit ADC 2.5 Msps, up to 16 bits with hardware oversampling,
127 - 12-bit DAC, low-power sample-and-hold
128 - 2x ultra-low-power comparators
130 - System peripherals
132 - Mailbox and semaphores for communication between Cortex®-M4 and Cortex®-M0+
135 - Controllers
137 - 2x DMA controller (7 channels each) supporting ADC, DAC, SPI, I2C, LPUART,
139 - 2x USART (ISO 7816, IrDA, SPI)
140 - 1x LPUART (low-power)
141 - 2x SPI 16 Mbit/s (1 over 2 supporting I2S)
142 - 3x I2C (SMBus/PMBus™)
143 - 2x 16-bit 1-channel timer
144 - 1x 16-bit 4-channel timer (supporting motor control)
145 - 1x 32-bit 4-channel timer
146 - 3x 16-bit ultra-low-power timer
147 - 1x RTC with 32-bit sub-second wakeup counter
148 - 1x independent SysTick
149 - 1x independent watchdog
150 - 1x window watchdog
152 - Up to 43 I/Os, most 5 V-tolerant
153 - Development support
154 - Serial-wire debug (SWD), JTAG
155 - Dual CPU cross trigger capabilities
160 - `STM32WL55JC on www.st.com`_
161 - `STM32WL55JC datasheet`_
162 - `STM32WL55JC reference manual`_
170 +-----------+------------+-------------------------------------+
173 | AES | on-chip | crypto |
174 +-----------+------------+-------------------------------------+
175 | CLOCK | on-chip | reset and clock_control |
176 +-----------+------------+-------------------------------------+
177 | FLASH | on-chip | flash |
178 +-----------+------------+-------------------------------------+
179 | GPIO | on-chip | gpio |
180 +-----------+------------+-------------------------------------+
181 | I2C | on-chip | i2c |
182 +-----------+------------+-------------------------------------+
183 | MPU | on-chip | arch/arm |
184 +-----------+------------+-------------------------------------+
185 | NVIC | on-chip | arch/arm |
186 +-----------+------------+-------------------------------------+
187 | PINMUX | on-chip | pinmux |
188 +-----------+------------+-------------------------------------+
189 | RADIO | on-chip | LoRa |
190 +-----------+------------+-------------------------------------+
191 | RNG | on-chip | entropy |
192 +-----------+------------+-------------------------------------+
193 | SPI | on-chip | spi |
194 +-----------+------------+-------------------------------------+
195 | UART | on-chip | serial port-polling; |
196 | | | serial port-interrupt |
197 +-----------+------------+-------------------------------------+
198 | ADC | on-chip | ADC Controller |
199 +-----------+------------+-------------------------------------+
200 | DAC | on-chip | DAC Controller |
201 +-----------+------------+-------------------------------------+
202 | die-temp | on-chip | die temperature sensor |
203 +-----------+------------+-------------------------------------+
204 | RTC | on-chip | rtc |
205 +-----------+------------+-------------------------------------+
211 - :zephyr_file:`boards/st/nucleo_wl55jc/nucleo_wl55jc_defconfig`
212 - :zephyr_file:`boards/st/nucleo_wl55jc/nucleo_wl55jc.dts`
219 for pin muxing, input/output, pull-up, etc.
222 ----------------------------------
224 .. rst-class:: rst-columns
226 - LPUART_1 TX/RX : PA3/PA2 (ST-Link Virtual Port Com)
227 - I2C_2_SCL : PA12 (Arduino I2C)
228 - I2C_2_SDA : PA11 (Arduino I2C)
229 - SPI_1_NSS : PA4 (arduino_spi)
230 - SPI_1_SCK : PA5 (arduino_spi)
231 - SPI_1_MISO : PA6 (arduino_spi)
232 - SPI_1_MOSI : PA7 (arduino_spi)
233 - ADC1_IN5 : PB1 (Arduino pin A0)
234 - DAC1_OUT1 : PA10 (Arduino pin A2)
237 ------------
244 -----------
254 Nucleo WL55JC board includes an STLINK-V3 embedded debug tool interface.
263 so its :ref:`installation <stm32cubeprog-flash-host-tools>` is required.
266 the ``--runner`` (or ``-r``) option:
268 .. code-block:: console
270 $ west flash --runner openocd
274 ----------------------------------------
278 :zephyr:code-sample:`hello_world` application.
282 .. code-block:: console
284 $ minicom -D /dev/ttyUSB0
288 .. zephyr-app-commands::
289 :zephyr-app: samples/hello_world
295 .. code-block:: console
302 sleep mode. Unfortunately, default openocd configuration, which is debug
303 compatible, doesn't allow flashing when SoC is in sleep mode.
305 please update board's openocd.cfg configuration file to select sleep mode
312 :zephyr:code-sample:`blinky` application.
314 .. zephyr-app-commands::
315 :zephyr-app: samples/basic/blinky
317 :maybe-skip-config:
321 https://www.st.com/en/evaluation-tools/nucleo-wl55jc.html
324 https://www.st.com/en/microcontrollers-microprocessors/stm32wl55jc.html
330 …com/resource/en/reference_manual/dm00451556-stm32wl5x-advanced-armbased-32bit-mcus-with-subghz-rad…
333 https://www.st.com/en/development-tools/stm32cubeprog.html