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3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h>
13 #include <zephyr/dt-bindings/adc/adc.h>
14 #include "ek_ra8d1-pinctrl.dtsi"
17 model = "Renesas EK-RA8D1";
24 zephyr,shell-uart = &uart9;
26 zephyr,flash-controller = &flash1;
31 compatible = "gpio-leds";
47 compatible = "gpio-keys";
61 compatible = "zephyr,memory-region", "mmio-sram";
64 zephyr,memory-region = "SDRAM";
68 renesas_mipi_connector: mipi-connector {
69 compatible = "renesas,ra-gpio-mipi-header";
70 #gpio-cells = <2>;
71 gpio-map-mask = <0xffffffff 0xffffffc0>;
72 gpio-map-pass-thru = <0 0x3f>;
73 gpio-map = <14 0 &ioport5 11 0>, /* IIC_SDA */
84 mipi-dsi = &mipi_dsi;
89 clock-frequency = <DT_FREQ_M(20)>;
91 #clock-cells = <0>;
159 pinctrl-0 = <&sci9_default>;
160 pinctrl-names = "default";
164 pinctrl-0 = <&sci9_default>;
165 pinctrl-names = "default";
168 current-speed = <115200>;
178 pinctrl-0 = <&spi0_default>;
179 pinctrl-names = "default";
185 compatible = "fixed-partitions";
186 #address-cells = <1>;
187 #size-cells = <1>;
197 pinctrl-0 = <&pwm7_default>;
199 interrupt-names = "gtioca", "overflow";
200 pinctrl-names = "default";
207 pinctrl-0 = <&canfd0_default>;
208 pinctrl-names = "default";
209 rx-max-filters = <16>;
215 #address-cells = <1>;
216 #size-cells = <0>;
217 clock-frequency = <DT_FREQ_M(1)>;
218 pinctrl-0 = <&iic1_default>;
219 pinctrl-names = "default";
223 local-mac-address = [74 90 50 B0 5D E9];
225 phy-handle = <&phy>;
229 pinctrl-0 = <ðer_default>;
230 pinctrl-names = "default";
233 phy: ethernet-phy@5 {
234 compatible = "ethernet-phy";
241 pinctrl-0 = <&usbhs_default>;
242 pinctrl-names = "default";
243 maximum-speed = "high-speed";
251 phys-clock-src = "xtal";
256 pinctrl-0 = <&adc0_default>;
257 pinctrl-names = "default";
271 pinctrl-0 = <&sdram_default>;
272 pinctrl-names = "default";
274 auto-refresh-interval = <SDRAM_AUTO_REFREDSH_INTERVEL_10CYCLES>;
275 auto-refresh-count = <SDRAM_AUTO_REFREDSH_COUNT_8TIMES>;
276 precharge-cycle-count = <SDRAM_AUTO_PRECHARGE_CYCLE_3CYCLES>;
277 multiplex-addr-shift = "10-bit";
278 edian-mode = "little-endian";
279 continuous-access;
280 bus-width = "16-bit";
283 renesas,ra-sdram-timing = <SDRAM_TRAS_6CYCLES
294 pinctrl-0 = <&glcdc_default>;
295 pinctrl-names = "default";