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3 phyBOARD-Pollux i.MX8M Plus
9 The phyBOARD-Pollux is based upon the phyCORE-i.MX8M Plus SOM which is based on
10 the NXP i.MX8M Plus SoC. The SoC includes four Coretex-A53 cores and one
11 Coretex-M7 core for real time applications like Zephyr. The phyBOARD-Pollux
19 - Memory:
21 - RAM: 256MB - 8GB LPDDR4
22 - EEPROM: 4kB - 32kB
23 - eMMC: 4GB - 64GB (eMMC 5.1)
24 - SPI NOR Flash: 4MB - 256MB
25 - Interfaces:
27 - Ethernet: 2x 10/100/1000BASE-T (1x TSN Support)
28 - USB: 2x 3.0 Host
29 - Serial: 1x RS232 / RS485 Full Duplex / Half Duplex
30 - CAN: 2x CAN FD
31 - Digital I/O: via Expansion Connector
32 - PCIe: 1x miniPCIe
33 - MMX/SD/SDIO: microSD slot
34 - Display: LVDS(1x4 or 1x8), MIPI DSI(1x4), HDMI
35 - Audio: SAI
36 - Camera: 2x MIPI CSI-2 (phyCAM-M)
37 - Expansion Bus: I2C, SPI, SDIO, UART, USB
38 - JTAG: via PEB-EVAL-01
39 - LEDs:
41 - 1x Multicolor Status LED via I2C
48 :alt: phyBOARD-Pollux
58 +-----------+------------+------------------------------------+
61 | NVIC | on-chip | nested vector interrupt controller |
62 +-----------+------------+------------------------------------+
63 | SYSTICK | on-chip | systick |
64 +-----------+------------+------------------------------------+
65 | CLOCK | on-chip | clock_control |
66 +-----------+------------+------------------------------------+
67 | PINMUX | on-chip | pinmux |
68 +-----------+------------+------------------------------------+
69 | UART | on-chip | serial port-polling; |
70 | | | serial port-interrupt |
71 +-----------+------------+------------------------------------+
72 | GPIO | on-chip | GPIO output |
74 +-----------+------------+------------------------------------+
79 It's recommended to disable peripherals used by the M7-Core on the host running
81 Zephyr on the M7-Core.
89 ----
91 +-----------------+----------+----------------------------+
95 +-----------------+----------+----------------------------+
97 +-----------------+----------+----------------------------+
99 +-----------------+----------+----------------------------+
106 ----
110 :zephyr_file:`dts/arm/nxp/nxp_imx8ml_m7.dtsi`. The Pinout of the phyBOARD-Polis
116 The i.MX8MP does not have a separate flash for the M7-Core. Because of this
117 the A53-Core has to load the program for the M7-Core to the right memory
123 +---------+-----------------------+------------------------+-----------------------+-------+
124 | Region | Cortex-A53 | Cortex-M7 (System Bus) | Cortex-M7 (Code Bus) | Size |
126 | OCRAM | 0x00900000-0x0098FFFF | 0x20200000-0x2028FFFF | 0x00900000-0x0098FFFF | 576KB |
127 +---------+-----------------------+------------------------+-----------------------+-------+
128 | DTCM | 0x00800000-0x0081FFFF | 0x20000000-0x2001FFFF | | 128KB |
129 +---------+-----------------------+------------------------+-----------------------+-------+
130 | ITCM | 0x007E0000-0x007FFFFF | | 0x00000000-0x0001FFFF | 128KB |
131 +---------+-----------------------+------------------------+-----------------------+-------+
132 | OCRAM_S | 0x00180000-0x00188FFF | 0x20180000-0x20188FFF | 0x00180000-0x00188FFF | 36KB |
133 +---------+-----------------------+------------------------+-----------------------+-------+
134 | DDR | 0x80000000-0x803FFFFF | 0x80200000-0x803FFFFF | 0x80000000-0x801FFFFF | 2MB |
135 +---------+-----------------------+------------------------+-----------------------+-------+
147 .. code-block:: DTS
156 .. code-block:: DTS
167 .. code-block:: cfg
176 available via the onboard dual USB-to-UART converter. If you use Linux, create a
180 .. code-block:: console
182 …# echo 'ATTR{idProduct}=="0a70", ATTR{idVendor}=="10c4", MODE="0666", GROUP="plugdev"' > /etc/udev…
186 .. code-block:: console
188 $ sudo udevadm control --reload-rules
194 .. code-block:: console
196 $ minicom -D /dev/ttyUSB1 -b 115200
201 The phyBOARD-Pollux can be debugged using a JTAG or SWD debug adapter. A Segger
203 ``PEB-EVAL-01`` shield.
205 .. figure:: img/PEB-EVAL-01.jpg
206 :alt: PEB-EVAL-01
209 PEB-EVAL-01
214 .. code-block:: console
216 u-boot=> bootaux 0x7e0000
218 Here is an example for the :zephyr:code-sample:`hello_world` application:
220 .. zephyr-app-commands::
221 :zephyr-app: samples/hello_world
227 .. code-block:: console
234 .. zephyr-app-commands::
235 :zephyr-app: samples/hello_world
239 Starting the M7-Core from U-Boot and Linux
242 Loading binaries and starting the M7-Core is supported from Linux via remoteproc
243 or from U-boot by directly copying the firmware binary. Please check the
244 `phyCORE-i.MX 8M Plus BSP Manual`_ for more information.
249 - `i.MX 8M Plus Applications Processor Reference Manual`_
250 - `phyCORE-i.MX 8M Plus BSP Manual`_
253 https://www.phytec.de/produkte/single-board-computer/phyboard-pollux/
261 .. _phyCORE-i.MX 8M Plus BSP Manual:
262 https://phytec.github.io/doc-bsp-yocto/bsp/imx8/imx8mp/imx8mp.html