Lines Matching +full:enable +full:- +full:wait +full:- +full:mode

3 ;   SPDX-License-Identifier: Apache-2.0                                        *
5 ;   Lauterbach Trace32 start-up script for S32Z27x / Cortex-R52                *
8 ;   - command     operation to execute                                         *
11 ;   - elfFile     filepath of ELF to load                                      *
12 ;   - rtu         Real-Time Unit (RTU) index                                   *
15 ;   - core        core index, relative to the RTU                              *
18 ;   - lockstep    set to "yes" to start the core in lock-step mode             *
19 ;                 in Lockstep mode:                                            *
20 ;                  - Core0 and Core2 (redundancy) operate as a lockstep pair   *
21 ;                  - Core1 and Core3 (redundancy) operate as a lockstep pair   *
59 ; select lock-step or split-lock mode (CFG_CORE.SPLT_LCK bit)
84 WAIT 10ms
87 WAIT 10ms
92 SYStem.CPU S32Z270-M33-SMU
101 SYStem.Mode Prepare
102 WAIT 1.s
109 ; Configure Miscellaneous Debug Module AP (MDM-AP) for RTU's
120 ; Set reset value for split-lock mode
130 SYStem.CPU S32Z270-R52-RTU&(rtu)
140 WAIT 200ms
185   WAIT 100ms
190   ; Enable the interconnect interface of reset domain
202   WAIT 200ms
214   WAIT 100ms
219   ; Enable the interconnect interface of reset domain
231   WAIT 200ms
233   ; Enable RTU1 NIC
242 ; EnableR52_<core>_<rtu> - routines for waking up the RTU cores:
243 ; - set boot address (MC_ME_PRTNy_COREx_ADDR)
244 ; - enable core clock
245 ; - trigger the clock update
246 ; - store key for starting the hw process
247 ; - force core reset