Lines Matching refs:pinmux
15 pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>,
27 pinmux = <&iomuxc_gpio_ad_b1_02_gpio1_io18>;
35 pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>,
55 pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>;
63 pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>,
80 pinmux = <&iomuxc_gpio_emc_40_enet_mdc>,
94 pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>,
105 pinmux = <&iomuxc_gpio_ad_b1_08_flexcan1_tx>,
115 pinmux = <&iomuxc_gpio_ad_b0_14_flexcan2_tx>,
125 pinmux = <&iomuxc_gpio_emc_36_flexcan3_tx>,
136 pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>;
148 pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>,
165 pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>,
193 pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>,
203 pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>,
216 pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>,
229 pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>,
241 pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>,
251 pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>;
259 pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>;
268 pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
279 pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>,
291 pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>;
299 pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>;
308 pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>,
322 pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>;
331 pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
339 pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>,
353 pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>;
362 pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>;
369 /* fast pinmux settings for USDHC (over 100 Mhz) */
372 pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
380 pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
394 /* medium pinmux settings for USDHC (under 100 Mhz) */
397 pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
405 pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,
419 /* slow pinmux settings for USDHC (under 50 Mhz) */
422 pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>;
430 pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>,