Lines Matching +full:pll +full:- +full:clock +full:- +full:names
4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <st/f4/stm32f412c(e-g)ux-pinctrl.dtsi>
14 compatible = "google,dragonclaw-fpmcu";
18 zephyr,shell-uart = &usart2;
21 zephyr,flash-controller = &flash;
26 /* HSI clock frequency is 16MHz */
31 /* LSI clock frequency is 32768kHz */
35 &pll {
36 div-m = <8>;
37 mul-n = <192>; /* 16MHz * 192/8 = 384MHz VCO clock */
38 div-p = <4>; /* 96MHz PLL general clock output */
39 div-q = <8>; /* 48MHz PLL output for USB, SDIO, RNG */
40 div-r = <7>; /* I2S - lowest possible frequency to save power */
46 clocks = <&pll>; /* Select PLL as SYSCLK source (96MHz) */
47 ahb-prescaler = <1>; /* SYSCLK not divided */
48 clock-frequency = <DT_FREQ_M(96)>; /* AHB frequency */
49 apb1-prescaler = <2>; /* AHB clock divided by 2 */
50 apb2-prescaler = <2>; /* AHB clock divided by 2 */
55 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>;
56 pinctrl-names = "default";
57 current-speed = <115200>;
63 pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
64 pinctrl-names = "default";
65 current-speed = <115200>;
71 pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5
73 pinctrl-names = "default";
79 pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
81 pinctrl-names = "default";
107 gpio-hog;
114 gpio-hog;
122 gpio-hog;
128 * The board uses STM32F412CG in UFQFPN48 package in which gpio[d-g] is not