Lines Matching +full:esp32 +full:- +full:s3
6 The ESP32-S3-DevKitC is an entry-level development board equipped with either ESP32-S3-WROOM-1
7 or ESP32-S3-WROOM-1U, a module named for its small size. This board integrates complete Wi-Fi
8 and Bluetooth Low Energy functions. For more information, check `ESP32-S3-DevKitC`_.
13 ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi
14 and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
15 (Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband,
18 ESP32-S3-DevKitC includes the following features:
20 - Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz
21 - Additional vector instructions support for AI acceleration
22 - 512KB of SRAM
23 - 384KB of ROM
24 - Wi-Fi 802.11b/g/n
25 - Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate
29 - 45 programmable GPIOs
30 - 4x SPI
31 - 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between …
32 - 1x DVP 8-bit ~16-bit camera interface
33 - 3x UART
34 - 2x I2C
35 - 2x I2S
36 - 1x RMT (TX/RX)
37 - 1x pulse counter
38 - LED PWM controller, up to 8 channels
39 - 1x full-speed USB OTG
40 - 1x USB Serial/JTAG controller
41 - 2x MCPWM
42 - 1x SDIO host controller with 2 slots
43 - General DMA controller (GDMA), with 5 transmit channels and 5 receive channels
44 - 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)
45 - Addressable RGB LED, driven by GPIO38.
49 - 2x 12-bit SAR ADCs, up to 20 channels
50 - 1x temperature sensor
51 - 14x touch sensing IOs
55 - 4x 54-bit general-purpose timers
56 - 1x 52-bit system timer
57 - 3x watchdog timers
61 - Power Management Unit with five power modes
62 - Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM
66 - Secure boot
67 - Flash encryption
68 - 4-Kbit OTP, up to 1792 bits for users
69 - Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)
74 ESP32S3-DevKitC allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core
75 architecture, each core can be enabled to execute customized tasks in stand-alone mode
76 and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as cod…
78 For more information, check the datasheet at `ESP32-S3 Datasheet`_ or the technical reference
79 manual at `ESP32-S3 Technical Reference Manual`_.
84 Current Zephyr's ESP32-S3-DevKitC board supports the following features:
86 +------------+------------+-------------------------------------+
89 | UART | on-chip | serial port |
90 +------------+------------+-------------------------------------+
91 | GPIO | on-chip | gpio |
92 +------------+------------+-------------------------------------+
93 | PINMUX | on-chip | pinmux |
94 +------------+------------+-------------------------------------+
95 | USB-JTAG | on-chip | hardware interface |
96 +------------+------------+-------------------------------------+
97 | SPI Master | on-chip | spi |
98 +------------+------------+-------------------------------------+
99 | TWAI/CAN | on-chip | can |
100 +------------+------------+-------------------------------------+
101 | ADC | on-chip | adc |
102 +------------+------------+-------------------------------------+
103 | Timers | on-chip | counter |
104 +------------+------------+-------------------------------------+
105 | Watchdog | on-chip | watchdog |
106 +------------+------------+-------------------------------------+
107 | TRNG | on-chip | entropy |
108 +------------+------------+-------------------------------------+
109 | LEDC | on-chip | pwm |
110 +------------+------------+-------------------------------------+
111 | MCPWM | on-chip | pwm |
112 +------------+------------+-------------------------------------+
113 | PCNT | on-chip | qdec |
114 +------------+------------+-------------------------------------+
115 | GDMA | on-chip | dma |
116 +------------+------------+-------------------------------------+
117 | USB-CDC | on-chip | serial |
118 +------------+------------+-------------------------------------+
121 -------------
126 .. code-block:: console
171 bootstrap the board with the ESP32-S3 SoC.
175 .. zephyr-app-commands::
177 :zephyr-app: samples/hello_world
180 :west-args: --sysbuild
183 By default, the ESP32 sysbuild creates bootloader (MCUboot) and application
189 .. code-block::
204 With ``--sysbuild`` option the bootloader will be re-build and re-flash
225 .. zephyr-app-commands::
226 :zephyr-app: samples/hello_world
231 configuration. Here is an example for the :zephyr:code-sample:`hello_world`
234 .. zephyr-app-commands::
235 :zephyr-app: samples/hello_world
241 .. code-block:: shell
248 .. code-block:: console
250 ***** Booting Zephyr OS vx.x.x-xxx-gxxxxxxxxxxxx *****
256 ESP32-S3 support on OpenOCD is available at `OpenOCD ESP32`_.
258 ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB…
260 Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S3`_.
262 Here is an example for building the :zephyr:code-sample:`hello_world` application.
264 .. zephyr-app-commands::
265 :zephyr-app: samples/hello_world
269 You can debug an application in the usual way. Here is an example for the :zephyr:code-sample:`hell…
271 .. zephyr-app-commands::
272 :zephyr-app: samples/hello_world
279 .. target-notes::
281 .. _`ESP32-S3-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/hw-reference/…
282 .. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroo…
283 .. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentat…
284 .. _`JTAG debugging for ESP32-S3`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/ap…
285 .. _`OpenOCD ESP32`: https://github.com/espressif/openocd-esp32/releases