537 	uint32_t *l2_table;  in l2_page_table_unmap()  local
552 	l2_table = (uint32_t *)(l1_table[l1_pos] & XTENSA_MMU_PTE_PPN_MASK);  in l2_page_table_unmap()
554 	sys_cache_data_invd_range((void *)&l2_table[l2_pos], sizeof(l2_table[0]));  in l2_page_table_unmap()
556 	l2_table[l2_pos] = XTENSA_MMU_PTE_ILLEGAL;  in l2_page_table_unmap()
558 	sys_cache_data_flush_range((void *)&l2_table[l2_pos], sizeof(l2_table[0]));  in l2_page_table_unmap()
561 		if (!is_pte_illegal(l2_table[l2_pos])) {  in l2_page_table_unmap()
569 	table_pos = (l2_table - (uint32_t *)l2_page_tables) / (XTENSA_L2_PAGE_TABLE_ENTRIES);  in l2_page_table_unmap()
751 		uint32_t *l2_table, *src_l2_table;  in dup_table()  local
760 		l2_table = alloc_l2_table();  in dup_table()
761 		if (l2_table == NULL) {  in dup_table()
768 			l2_table[j] =  src_l2_table[j];  in dup_table()
772 				ring = XTENSA_MMU_PTE_RING_GET(l2_table[j]);  in dup_table()
773 				l2_table[j] =  XTENSA_MMU_PTE_ATTR_SET(l2_table[j], original_attr);  in dup_table()
774 				l2_table[j] =  XTENSA_MMU_PTE_RING_SET(l2_table[j],  in dup_table()
783 		dst_table[i] = XTENSA_MMU_PTE((uint32_t)l2_table, XTENSA_MMU_KERNEL_RING,  in dup_table()
786 		sys_cache_data_flush_range((void *)l2_table, XTENSA_L2_PAGE_TABLE_SIZE);  in dup_table()
850 		uint32_t *l2_table, pte;  in region_map_update()  local
857 		l2_table = (uint32_t *)(ptables[l1_pos] & XTENSA_MMU_PTE_PPN_MASK);  in region_map_update()
859 		sys_cache_data_invd_range((void *)&l2_table[l2_pos], sizeof(l2_table[0]));  in region_map_update()
861 		pte = XTENSA_MMU_PTE_RING_SET(l2_table[l2_pos], ring);  in region_map_update()
864 		l2_table[l2_pos] = pte;  in region_map_update()
866 		sys_cache_data_flush_range((void *)&l2_table[l2_pos], sizeof(l2_table[0]));  in region_map_update()
1049 	uint32_t rasid, pte, *l2_table;  in page_validate()  local
1057 	l2_table = (uint32_t *)(ptables[l1_pos] & XTENSA_MMU_PTE_PPN_MASK);  in page_validate()
1058 	pte = l2_table[l2_pos];  in page_validate()