Lines Matching defs:value
84 #define ADS114S0X_REGISTER_GET_VALUE(value, pos, length) \ argument
86 #define ADS114S0X_REGISTER_SET_VALUE(target, value, pos, length) \ argument
92 #define ADS114S0X_REGISTER_ID_DEV_ID_GET(value) \ argument
95 #define ADS114S0X_REGISTER_ID_DEV_ID_SET(target, value) \ argument
100 #define ADS114S0X_REGISTER_STATUS_FL_POR_GET(value) \ argument
103 #define ADS114S0X_REGISTER_STATUS_FL_POR_SET(target, value) \ argument
108 #define ADS114S0X_REGISTER_STATUS_NOT_RDY_GET(value) \ argument
111 #define ADS114S0X_REGISTER_STATUS_NOT_RDY_SET(target, value) \ argument
116 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILP_GET(value) \ argument
119 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILP_SET(target, value) \ argument
124 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILN_GET(value) \ argument
127 #define ADS114S0X_REGISTER_STATUS_FL_P_RAILN_SET(target, value) \ argument
132 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILP_GET(value) \ argument
135 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILP_SET(target, value) \ argument
140 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILN_GET(value) \ argument
143 #define ADS114S0X_REGISTER_STATUS_FL_N_RAILN_SET(target, value) \ argument
148 #define ADS114S0X_REGISTER_STATUS_FL_REF_L1_GET(value) \ argument
151 #define ADS114S0X_REGISTER_STATUS_FL_REF_L1_SET(target, value) \ argument
156 #define ADS114S0X_REGISTER_STATUS_FL_REF_L0_GET(value) \ argument
159 #define ADS114S0X_REGISTER_STATUS_FL_REF_L0_SET(target, value) \ argument
164 #define ADS114S0X_REGISTER_INPMUX_MUXP_GET(value) \ argument
167 #define ADS114S0X_REGISTER_INPMUX_MUXP_SET(target, value) \ argument
172 #define ADS114S0X_REGISTER_INPMUX_MUXN_GET(value) \ argument
175 #define ADS114S0X_REGISTER_INPMUX_MUXN_SET(target, value) \ argument
180 #define ADS114S0X_REGISTER_PGA_DELAY_GET(value) \ argument
183 #define ADS114S0X_REGISTER_PGA_DELAY_SET(target, value) \ argument
188 #define ADS114S0X_REGISTER_PGA_PGA_EN_GET(value) \ argument
191 #define ADS114S0X_REGISTER_PGA_PGA_EN_SET(target, value) \ argument
196 #define ADS114S0X_REGISTER_PGA_GAIN_GET(value) \ argument
199 #define ADS114S0X_REGISTER_PGA_GAIN_SET(target, value) \ argument
204 #define ADS114S0X_REGISTER_DATARATE_G_CHOP_GET(value) \ argument
207 #define ADS114S0X_REGISTER_DATARATE_G_CHOP_SET(target, value) \ argument
212 #define ADS114S0X_REGISTER_DATARATE_CLK_GET(value) \ argument
215 #define ADS114S0X_REGISTER_DATARATE_CLK_SET(target, value) \ argument
220 #define ADS114S0X_REGISTER_DATARATE_MODE_GET(value) \ argument
223 #define ADS114S0X_REGISTER_DATARATE_MODE_SET(target, value) \ argument
228 #define ADS114S0X_REGISTER_DATARATE_FILTER_GET(value) \ argument
231 #define ADS114S0X_REGISTER_DATARATE_FILTER_SET(target, value) \ argument
236 #define ADS114S0X_REGISTER_DATARATE_DR_GET(value) \ argument
239 #define ADS114S0X_REGISTER_DATARATE_DR_SET(target, value) \ argument
244 #define ADS114S0X_REGISTER_REF_FL_REF_EN_GET(value) \ argument
247 #define ADS114S0X_REGISTER_REF_FL_REF_EN_SET(target, value) \ argument
252 #define ADS114S0X_REGISTER_REF_NOT_REFP_BUF_GET(value) \ argument
255 #define ADS114S0X_REGISTER_REF_NOT_REFP_BUF_SET(target, value) \ argument
260 #define ADS114S0X_REGISTER_REF_NOT_REFN_BUF_GET(value) \ argument
263 #define ADS114S0X_REGISTER_REF_NOT_REFN_BUF_SET(target, value) \ argument
268 #define ADS114S0X_REGISTER_REF_REFSEL_GET(value) \ argument
271 #define ADS114S0X_REGISTER_REF_REFSEL_SET(target, value) \ argument
276 #define ADS114S0X_REGISTER_REF_REFCON_GET(value) \ argument
279 #define ADS114S0X_REGISTER_REF_REFCON_SET(target, value) \ argument
284 #define ADS114S0X_REGISTER_IDACMAG_FL_RAIL_EN_GET(value) \ argument
287 #define ADS114S0X_REGISTER_IDACMAG_FL_RAIL_EN_SET(target, value) \ argument
292 #define ADS114S0X_REGISTER_IDACMAG_PSW_GET(value) \ argument
295 #define ADS114S0X_REGISTER_IDACMAG_PSW_SET(target, value) \ argument
300 #define ADS114S0X_REGISTER_IDACMAG_IMAG_GET(value) \ argument
303 #define ADS114S0X_REGISTER_IDACMAG_IMAG_SET(target, value) \ argument
308 #define ADS114S0X_REGISTER_IDACMUX_I2MUX_GET(value) \ argument
311 #define ADS114S0X_REGISTER_IDACMUX_I2MUX_SET(target, value) \ argument
316 #define ADS114S0X_REGISTER_IDACMUX_I1MUX_GET(value) \ argument
319 #define ADS114S0X_REGISTER_IDACMUX_I1MUX_SET(target, value) \ argument
324 #define ADS114S0X_REGISTER_VBIAS_VB_LEVEL_GET(value) \ argument
327 #define ADS114S0X_REGISTER_VBIAS_VB_LEVEL_SET(target, value) \ argument
332 #define ADS114S0X_REGISTER_GPIODAT_DIR_GET(value) \ argument
335 #define ADS114S0X_REGISTER_GPIODAT_DIR_SET(target, value) \ argument
340 #define ADS114S0X_REGISTER_GPIODAT_DAT_GET(value) \ argument
343 #define ADS114S0X_REGISTER_GPIODAT_DAT_SET(target, value) \ argument
348 #define ADS114S0X_REGISTER_GPIOCON_CON_GET(value) \ argument
351 #define ADS114S0X_REGISTER_GPIOCON_CON_SET(target, value) \ argument
457 enum ads114s0x_register register_address, uint8_t *value) in ads114s0x_read_register()
497 enum ads114s0x_register register_address, uint8_t value) in ads114s0x_write_register()
1227 int ads114s0x_gpio_set_pin_value(const struct device *dev, uint8_t pin, bool value) in ads114s0x_gpio_set_pin_value()
1256 int ads114s0x_gpio_get_pin_value(const struct device *dev, uint8_t pin, bool *value) in ads114s0x_gpio_get_pin_value()
1286 int ads114s0x_gpio_port_get_raw(const struct device *dev, gpio_port_value_t *value) in ads114s0x_gpio_port_get_raw()
1304 gpio_port_value_t value) in ads114s0x_gpio_port_set_masked_raw()