Lines Matching full:arc
1 # ARC options
6 menu "ARC Options"
7 depends on ARC
10 default "arc"
17 This option signifies the use of an ARC EM CPU
23 This option signifies the use of an ARC HS CPU
27 prompt "ARC Instruction Set"
31 bool "ARC ISA v2"
37 v2 ISA for the ARC-HS & ARC-EM cores
40 bool "ARC ISA v3"
52 If y, the SoC uses an ARC EM4 CPU
58 If y, the SoC uses an ARC EM4 DMIPS CPU
64 If y, the SoC uses an ARC EM4 DMIPS CPU with the single-precision
71 If y, the SoC uses an ARC EM4 DMIPS CPU with single-precision
78 If y, the SoC uses an ARC EM6 CPU
84 If y, the SoC uses an ARC HS3x or HS4x CPU
95 If y, the SoC uses an ARC HS6x CPU
102 menu "ARC CPU Options"
143 The ARC CPU can be configured to have more than one register
185 bool "ARC has STACK_CHECKING"
189 ARC is configured with STACK_CHECKING which is a mechanism for
194 bool "ARC has ARC connect"
197 ARC is configured with ARC CONNECT which is a hardware for connecting
204 Use ARC STACK_CHECKING to do stack protection
214 - The ARC stack checking, or
219 selection of the ARC stack checking is
227 ARC EM cores w/o secure shield 2+2 mode support might be configured
255 The ARC CPU can be configured to have two busses;
273 bool "ARC has SecureShield"
278 This option is enabled when ARC core supports secure mode
296 applicable to ARC processors that implement the SecureShield.
303 and normal resources of the ARC processors.
314 mode. The option is only applicable to ARC processors that
322 resources of the ARC processors, and, therefore, it shall avoid
325 menu "ARC MPU Options"
334 source "arch/arc/core/mpu/Kconfig"
342 int "ARC exception handling stack size"