1 /**************************************************************************/
2 /* */
3 /* Copyright (c) Microsoft Corporation. All rights reserved. */
4 /* */
5 /* This software is licensed under the Microsoft Software License */
6 /* Terms for Microsoft Azure RTOS. Full text of the license can be */
7 /* found in the LICENSE file at https://aka.ms/AzureRTOS_EULA */
8 /* and in the root directory of this software. */
9 /* */
10 /**************************************************************************/
11
12
13 /**************************************************************************/
14 /**************************************************************************/
15 /** */
16 /** USBX Component */
17 /** */
18 /** Utility */
19 /** */
20 /**************************************************************************/
21 /**************************************************************************/
22
23
24 /* Include necessary system files. */
25
26 #define UX_SOURCE_CODE
27
28 #include "ux_api.h"
29
30
31 /**************************************************************************/
32 /* */
33 /* FUNCTION RELEASE */
34 /* */
35 /* _ux_utility_pci_write PORTABLE C */
36 /* 6.1 */
37 /* AUTHOR */
38 /* */
39 /* Chaoqiong Xiao, Microsoft Corporation */
40 /* */
41 /* DESCRIPTION */
42 /* */
43 /* This function writes a 32/16/8 bit value to a specific PCI bus */
44 /* at a certain offset. */
45 /* */
46 /* INPUT */
47 /* */
48 /* bus_number PCI bus number */
49 /* device_number Device number */
50 /* function_number Function number */
51 /* offset Offset */
52 /* value Value to write */
53 /* write_size Size of write */
54 /* */
55 /* OUTPUT */
56 /* */
57 /* None */
58 /* */
59 /* CALLS */
60 /* */
61 /* outpl PCI output long function */
62 /* outpw PCI output word function */
63 /* outpb PCI output byte function */
64 /* */
65 /* CALLED BY */
66 /* */
67 /* USBX Components */
68 /* */
69 /* RELEASE HISTORY */
70 /* */
71 /* DATE NAME DESCRIPTION */
72 /* */
73 /* 05-19-2020 Chaoqiong Xiao Initial Version 6.0 */
74 /* 09-30-2020 Chaoqiong Xiao Modified comment(s), */
75 /* resulting in version 6.1 */
76 /* */
77 /**************************************************************************/
_ux_utility_pci_write(ULONG bus_number,ULONG device_number,ULONG function_number,ULONG offset,ULONG value,UINT write_size)78 VOID _ux_utility_pci_write(ULONG bus_number, ULONG device_number, ULONG function_number,
79 ULONG offset, ULONG value, UINT write_size)
80 {
81
82 ULONG destination_address;
83 ULONG cfg_ctrl;
84
85
86 /* Calculate the destination address. */
87 destination_address = (((bus_number << 16) & 0x00ff0000) | ((device_number << 11) & 0x0000f800) |
88 ((function_number << 8) & 0x00000700));
89
90 /* Calculate the configure control value. */
91 cfg_ctrl = destination_address | offset | 0x80000000;
92
93 /* Process relative to write size. */
94 switch(write_size)
95 {
96
97 case 32:
98
99 /* Write the address we need to write to. */
100 outpl(UX_PCI_CFG_CTRL_ADDRESS, cfg_ctrl);
101
102 /* Write the 32 bit content of this address. */
103 outpl(UX_PCI_CFG_DATA_ADDRESS, value);
104 break;
105
106 case 16:
107
108 /* Write the address we need to write to. */
109 outpl(UX_PCI_CFG_CTRL_ADDRESS, cfg_ctrl);
110
111 /* Write the 16 bit content of this address. */
112 outpw(UX_PCI_CFG_DATA_ADDRESS + (offset & 2), (USHORT) value);
113 break;
114
115 case 8:
116
117 /* Write the address we need to write to. */
118 outpl(UX_PCI_CFG_CTRL_ADDRESS, cfg_ctrl);
119
120 /* Write the 8 bit content of this address */
121 outpb(UX_PCI_CFG_DATA_ADDRESS + (offset & 3), (UCHAR) value);
122 break;
123
124 default:
125
126 break;
127 }
128 }
129
130
