1/***************************************************************************
2 * Copyright (c) 2024 Microsoft Corporation
3 *
4 * This program and the accompanying materials are made available under the
5 * terms of the MIT License which is available at
6 * https://opensource.org/licenses/MIT.
7 *
8 * SPDX-License-Identifier: MIT
9 **************************************************************************/
10
11
12/**************************************************************************/
13/**************************************************************************/
14/**                                                                       */
15/** ThreadX Component                                                     */
16/**                                                                       */
17/**   Initialize                                                          */
18/**                                                                       */
19/**************************************************************************/
20/**************************************************************************/
21
22#ifdef TX_INCLUDE_USER_DEFINE_FILE
23#include "tx_user.h"
24#endif
25
26SYSTEM_CLOCK        =     6000000
27SYSTICK_CYCLES      =     ((SYSTEM_CLOCK / 100) -1)
28
29/* Setup the stack and heap areas.  */
30
31STACK_SIZE          =     0x00000400
32HEAP_SIZE           =     0x00000000
33
34/**************************************************************************/
35/*                                                                        */
36/*  FUNCTION                                               RELEASE        */
37/*                                                                        */
38/*    _tx_initialize_low_level                          Cortex-Mxx/GNU    */
39/*                                                           6.2.1        */
40/*  AUTHOR                                                                */
41/*                                                                        */
42/*    Scott Larson, Microsoft Corporation                                 */
43/*                                                                        */
44/*  DESCRIPTION                                                           */
45/*                                                                        */
46/*    This function is responsible for any low-level processor            */
47/*    initialization, including setting up interrupt vectors, setting     */
48/*    up a periodic timer interrupt source, saving the system stack       */
49/*    pointer for use in ISR processing later, and finding the first      */
50/*    available RAM memory address for tx_application_define.             */
51/*                                                                        */
52/*  INPUT                                                                 */
53/*                                                                        */
54/*    None                                                                */
55/*                                                                        */
56/*  OUTPUT                                                                */
57/*                                                                        */
58/*    None                                                                */
59/*                                                                        */
60/*  CALLS                                                                 */
61/*                                                                        */
62/*    None                                                                */
63/*                                                                        */
64/*  CALLED BY                                                             */
65/*                                                                        */
66/*    _tx_initialize_kernel_enter           ThreadX entry function        */
67/*                                                                        */
68/*  RELEASE HISTORY                                                       */
69/*                                                                        */
70/*    DATE              NAME                      DESCRIPTION             */
71/*                                                                        */
72/*  09-30-2020      Scott Larson            Initial Version 6.1           */
73/*  01-31-2022      Scott Larson            Fixed predefined macro name,  */
74/*                                            resulting in version 6.1.10 */
75/*  03-08-2023      Scott Larson            Include tx_user.h,            */
76/*                                            resulting in version 6.2.1  */
77/*                                                                        */
78/**************************************************************************/
79// VOID   _tx_initialize_low_level(VOID)
80// {
81    .section .text
82    .balign 4
83    .syntax unified
84    .eabi_attribute Tag_ABI_align_preserved, 1
85    .global  _tx_initialize_low_level
86    .thumb_func
87.type _tx_initialize_low_level, function
88_tx_initialize_low_level:
89
90    /* Disable interrupts during ThreadX initialization.  */
91    CPSID   i
92
93    /* Set base of available memory to end of non-initialised RAM area.  */
94    LDR     r0, =_tx_initialize_unused_memory       // Build address of unused memory pointer
95    LDR     r1, =__RAM_segment_used_end__           // Build first free address
96    ADD     r1, r1, #4                              //
97    STR     r1, [r0]                                // Setup first unused memory pointer
98
99    /* Setup Vector Table Offset Register.  */
100    MOV     r0, #0xE000E000                         // Build address of NVIC registers
101    LDR     r1, =_vectors                           // Pickup address of vector table
102    STR     r1, [r0, #0xD08]                        // Set vector table address
103
104    /* Enable the cycle count register.  */
105    LDR     r0, =0xE0001000                         // Build address of DWT register
106    LDR     r1, [r0]                                // Pickup the current value
107    ORR     r1, r1, #1                              // Set the CYCCNTENA bit
108    STR     r1, [r0]                                // Enable the cycle count register
109
110    /* Set system stack pointer from vector value.  */
111    LDR     r0, =_tx_thread_system_stack_ptr        // Build address of system stack pointer
112    LDR     r1, =_vectors                           // Pickup address of vector table
113    LDR     r1, [r1]                                // Pickup reset stack pointer
114    STR     r1, [r0]                                // Save system stack pointer
115
116    /* Configure SysTick.  */
117    MOV     r0, #0xE000E000                         // Build address of NVIC registers
118    LDR     r1, =SYSTICK_CYCLES
119    STR     r1, [r0, #0x14]                         // Setup SysTick Reload Value
120    MOV     r1, #0x7                                // Build SysTick Control Enable Value
121    STR     r1, [r0, #0x10]                         // Setup SysTick Control
122
123    /* Configure handler priorities.  */
124    LDR     r1, =0x00000000                         // Rsrv, UsgF, BusF, MemM
125    STR     r1, [r0, #0xD18]                        // Setup System Handlers 4-7 Priority Registers
126    LDR     r1, =0xFF000000                         // SVCl, Rsrv, Rsrv, Rsrv
127    STR     r1, [r0, #0xD1C]                        // Setup System Handlers 8-11 Priority Registers
128                                                    // Note: SVC must be lowest priority, which is 0xFF
129    LDR     r1, =0x40FF0000                         // SysT, PnSV, Rsrv, DbgM
130    STR     r1, [r0, #0xD20]                        // Setup System Handlers 12-15 Priority Registers
131                                                    // Note: PnSV must be lowest priority, which is 0xFF
132
133    /* Return to caller.  */
134    BX      lr
135// }
136
137
138/* Define shells for each of the unused vectors.  */
139    .section .text
140    .balign 4
141    .syntax unified
142    .eabi_attribute Tag_ABI_align_preserved, 1
143    .global  __tx_BadHandler
144    .thumb_func
145.type __tx_BadHandler, function
146__tx_BadHandler:
147    B       __tx_BadHandler
148
149
150    .section .text
151    .balign 4
152    .syntax unified
153    .eabi_attribute Tag_ABI_align_preserved, 1
154    .global  __tx_IntHandler
155    .thumb_func
156.type __tx_IntHandler, function
157__tx_IntHandler:
158// VOID InterruptHandler (VOID)
159// {
160    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
161#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
162    BL      _tx_execution_isr_enter             // Call the ISR enter function
163#endif
164    /* Do interrupt handler work here */
165    /* .... */
166#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
167    BL      _tx_execution_isr_exit              // Call the ISR exit function
168#endif
169    POP     {r0,lr}
170    BX      lr
171// }
172
173
174    .section .text
175    .balign 4
176    .syntax unified
177    .eabi_attribute Tag_ABI_align_preserved, 1
178    .global  SysTick_Handler
179    .thumb_func
180.type SysTick_Handler, function
181SysTick_Handler:
182// VOID TimerInterruptHandler (VOID)
183// {
184    PUSH    {r0,lr}     // Save LR (and dummy r0 to maintain stack alignment)
185#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
186    BL      _tx_execution_isr_enter             // Call the ISR enter function
187#endif
188    BL      _tx_timer_interrupt
189#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
190    BL      _tx_execution_isr_exit              // Call the ISR exit function
191#endif
192    POP     {r0,lr}
193    BX      lr
194// }
195
196
197    .section .text
198    .balign 4
199    .syntax unified
200    .eabi_attribute Tag_ABI_align_preserved, 1
201    .global  HardFault_Handler
202    .thumb_func
203.type HardFault_Handler, function
204HardFault_Handler:
205    B       HardFault_Handler
206
207
208    .section .text
209    .balign 4
210    .syntax unified
211    .eabi_attribute Tag_ABI_align_preserved, 1
212    .global  UsageFault_Handler
213    .thumb_func
214.type UsageFault_Handler, function
215UsageFault_Handler:
216    CPSID   i                                       // Disable interrupts
217    // Check for stack limit fault
218    LDR     r0, =0xE000ED28                         // CFSR address
219    LDR     r1,[r0]                                 // Pick up CFSR
220    TST     r1, #0x00100000                         // Check for Stack Overflow
221_unhandled_usage_loop:
222    BEQ     _unhandled_usage_loop                   // If not stack overflow then loop
223
224    // Handle stack overflow
225    STR     r1, [r0]                                // Clear CFSR flag(s)
226
227#ifdef __ARM_FP
228    LDR     r0, =0xE000EF34                         // Cleanup FPU context: Load FPCCR address
229    LDR     r1, [r0]                                // Load FPCCR
230    BIC     r1, r1, #1                              // Clear the lazy preservation active bit
231    STR     r1, [r0]                                // Store the value
232#endif
233
234    LDR     r0, =_tx_thread_current_ptr             // Build current thread pointer address
235    LDR     r0,[r0]                                 // Pick up current thread pointer
236    PUSH    {r0,lr}                                 // Save LR (and r0 to maintain stack alignment)
237    BL      _tx_thread_stack_error_handler          // Call ThreadX/user handler
238    POP     {r0,lr}                                 // Restore LR and dummy reg
239
240#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
241    // Call the thread exit function to indicate the thread is no longer executing.
242    PUSH    {r0, lr}                                // Save LR (and r0 just for alignment)
243    BL      _tx_execution_thread_exit               // Call the thread exit function
244    POP     {r0, lr}                                // Recover LR
245#endif
246
247    MOV     r1, #0                                  // Build NULL value
248    LDR     r0, =_tx_thread_current_ptr             // Pickup address of current thread pointer
249    STR     r1, [r0]                                // Clear current thread pointer
250
251    // Return from UsageFault_Handler exception
252    LDR     r0, =0xE000ED04                         // Load ICSR
253    LDR     r1, =0x10000000                         // Set PENDSVSET bit
254    STR     r1, [r0]                                // Store ICSR
255    DSB                                             // Wait for memory access to complete
256    CPSIE   i                                       // Enable interrupts
257    BX      lr                                      // Return from exception
258
259
260
261    .section .text
262    .balign 4
263    .syntax unified
264    .eabi_attribute Tag_ABI_align_preserved, 1
265    .global  __tx_NMIHandler
266    .thumb_func
267.type __tx_NMIHandler, function
268__tx_NMIHandler:
269    B       __tx_NMIHandler
270
271
272    .section .text
273    .balign 4
274    .syntax unified
275    .eabi_attribute Tag_ABI_align_preserved, 1
276    .global  __tx_DBGHandler
277    .thumb_func
278.type __tx_DBGHandler, function
279__tx_DBGHandler:
280    B       __tx_DBGHandler
281
282    .end
283