1;/***************************************************************************
2; * Copyright (c) 2024 Microsoft Corporation
3; *
4; * This program and the accompanying materials are made available under the
5; * terms of the MIT License which is available at
6; * https://opensource.org/licenses/MIT.
7; *
8; * SPDX-License-Identifier: MIT
9; **************************************************************************/
10;
11;
12;/**************************************************************************/
13;/**************************************************************************/
14;/**                                                                       */
15;/** ThreadX Component                                                     */
16;/**                                                                       */
17;/**   Initialize                                                          */
18;/**                                                                       */
19;/**************************************************************************/
20;/**************************************************************************/
21;
22
23    .GLB __tx_initialize_unused_memory
24
25    IPR03    .EQU  87303H
26    IEN03    .EQU  87203H
27
28    .SECTION P,CODE
29
30;
31;/**************************************************************************/
32;/*                                                                        */
33;/*  FUNCTION                                               RELEASE        */
34;/*                                                                        */
35;/*    _tx_initialize_low_level                             RXv2/CCRX      */
36;/*                                                           6.1.11       */
37;/*  AUTHOR                                                                */
38;/*                                                                        */
39;/*    William E. Lamie, Microsoft Corporation                             */
40;/*                                                                        */
41;/*  DESCRIPTION                                                           */
42;/*                                                                        */
43;/*    This function is responsible for any low-level processor            */
44;/*    initialization, including setting up interrupt vectors, setting     */
45;/*    up a periodic timer interrupt source, saving the system stack       */
46;/*    pointer for use in ISR processing later, and finding the first      */
47;/*    available RAM memory address for tx_application_define.             */
48;/*                                                                        */
49;/*  INPUT                                                                 */
50;/*                                                                        */
51;/*    None                                                                */
52;/*                                                                        */
53;/*  OUTPUT                                                                */
54;/*                                                                        */
55;/*    None                                                                */
56;/*                                                                        */
57;/*  CALLS                                                                 */
58;/*                                                                        */
59;/*    None                                                                */
60;/*                                                                        */
61;/*  CALLED BY                                                             */
62;/*                                                                        */
63;/*    _tx_initialize_kernel_enter           ThreadX entry function        */
64;/*                                                                        */
65;/*  RELEASE HISTORY                                                       */
66;/*                                                                        */
67;/*    DATE              NAME                      DESCRIPTION             */
68;/*                                                                        */
69;/*  12-30-2020     William E. Lamie         Initial Version 6.1.3         */
70;/*  10-15-2021     William E. Lamie         Modified comment(s),          */
71;/*                                            resulting in version 6.1.9  */
72;/*  01-31-2022     William E. Lamie         Modified comment(s),          */
73;/*                                            resulting in version 6.1.10 */
74;/*  04-25-2022     William E. Lamie         Modified comment(s),          */
75;/*                                            resulting in version 6.1.11 */
76;/*                                                                        */
77;/**************************************************************************/
78
79    .GLB __tx_initialize_low_level
80__tx_initialize_low_level:
81;
82;    /* Save the first available memory address.  */
83;    _tx_initialize_unused_memory =  (VOID_PTR) &free_mem_start;
84;
85    MOV.L    #free_mem_start, R1                ; Pickup unused memory address
86    MOV.L    #__tx_initialize_unused_memory,R2
87    MOV.L    R1,[R2]                            ; Save first free memory address
88
89;   /* Set priority of SWINT to 1. */
90    MOV.L    #IPR03, r1
91    MOV.L    #1, r2
92    MOV.B    r2, [r1]
93
94;   /* Enable SWINT. */
95    MOV.L    #IEN03,r1
96    MOV.B    [r1], r2
97    OR       #(1 << 3), r2
98    MOV.B    r2, [r1]
99
100    RTS
101
102    .SECTION    FREEMEM ,DATA, ALIGN=4
103free_mem_start:
104    .BLKL 8              ; this section is last in the link map so we can access the end of RAM memory
105
106    .END
107