1 Microsoft's Azure RTOS ThreadX for Cortex-M0 2 3 Using the IAR Tools 4 51. Building the ThreadX run-time Library 6 7Building the ThreadX library is easy. First, open the Azure RTOS workspace 8azure_rtos.eww. Next, make the TX project the "active project" in the 9IAR Embedded Workbench and select the "Make" button. You should observe 10assembly and compilation of a series of ThreadX source files. This 11results in the ThreadX run-time library file tx.a, which is needed by 12the application. 13 14 152. Demonstration System 16 17The ThreadX demonstration is designed to execute under the IAR 18Windows-based Cortex-M0 simulator. 19 20Building the demonstration is easy; simply make the sample_threadx.ewp project 21the "active project" in the IAR Embedded Workbench and select the 22"Make" button. 23 24You should observe the compilation of sample_threadx.c (which is the demonstration 25application) and linking with tx.a. The resulting file sample_threadx.out is a 26binary file that can be downloaded and executed on IAR's Cortex-M0 simulator. 27 28 293. System Initialization 30 31The entry point in ThreadX for the Cortex-M0 using IAR tools is at label 32__iar_program_start. This is defined within the IAR compiler's startup code. 33In addition, this is where all static and global preset C variable 34initialization processing takes place. 35 36The ThreadX tx_initialize_low_level.s file is responsible for setting up 37various system data structures, and a periodic timer interrupt source. 38By default, the vector area is defined at the top of cstartup_M.s, which is 39a slightly modified from the base IAR file. 40 41The _tx_initialize_low_level function inside of tx_initialize_low_level.s 42also determines the first available address for use by the application, which 43is supplied as the sole input parameter to your application definition function, 44tx_application_define. To accomplish this, a section is created in 45tx_initialize_low_level.s called FREE_MEM, which must be located after all 46other RAM sections in memory. 47 48 494. Register Usage and Stack Frames 50 51The following defines the saved context stack frames for context switches 52that occur as a result of interrupt handling or from thread-level API calls. 53All suspended threads have the same stack frame in the Cortex-M0 version of 54ThreadX. The top of the suspended thread's stack is pointed to by 55tx_thread_stack_ptr in the associated thread control block TX_THREAD. 56 57 58 Stack Offset Stack Contents 59 60 0x00 LR Interrupted LR (LR at time of PENDSV) 61 0x04 r4 62 0x08 r5 63 0x0C r6 64 0x10 r7 65 0x14 r8 66 0x18 r9 67 0x1C r10 (sl) 68 0x20 r11 69 0x24 r0 (Hardware stack starts here!!) 70 0x28 r1 71 0x2C r2 72 0x30 r3 73 0x34 r12 74 0x38 lr 75 0x3C pc 76 0x40 xPSR 77 78 795. Improving Performance 80 81The distribution version of ThreadX is built without any compiler 82optimizations. This makes it easy to debug because you can trace or set 83breakpoints inside of ThreadX itself. Of course, this costs some 84performance. To make it run faster, you can change the ThreadX library 85project to enable various compiler optimizations. 86 87In addition, you can eliminate the ThreadX basic API error checking by 88compiling your application code with the symbol TX_DISABLE_ERROR_CHECKING 89defined. 90 91 926. Interrupt Handling 93 94ThreadX provides complete and high-performance interrupt handling for Cortex-M3 95targets. There are a certain set of requirements that are defined in the 96following sub-sections: 97 98 996.1 Vector Area 100 101The Cortex-M3 vectors start at the label __vector_table and is defined in cstartup_M.s. 102The application may modify the vector area according to its needs. 103 104 1056.2 Managed Interrupts 106 107ISRs for Cortex-M using the IAR tools can be written completely in C (or assembly 108language) without any calls to _tx_thread_context_save or _tx_thread_context_restore. 109These ISRs are allowed access to the ThreadX API that is available to ISRs. 110 111ISRs written in C will take the form (where "your_C_isr" is an entry in the vector table): 112 113void your_C_isr(void) 114{ 115 116 /* ISR processing goes here, including any needed function calls. */ 117} 118 119ISRs written in assembly language will take the form: 120 121 PUBLIC your_assembly_isr 122your_assembly_isr: 123 124 PUSH {lr} 125 126 ; ISR processing goes here, including any needed function calls. 127 128 POP {r0} 129 MOV lr, r0 130 BX lr 131 132 1337. IAR Thread-safe Library Support 134 135Thread-safe support for the IAR tools is easily enabled by building the ThreadX library 136and the application with TX_ENABLE_IAR_LIBRARY_SUPPORT. Also, the linker control file 137should have the following line added (if not already in place): 138 139initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application 140 141The project options "General Options -> Library Configuration" should also have the 142"Enable thread support in library" box selected. 143 144 1458. Revision History 146 147For generic code revision information, please refer to the readme_threadx_generic.txt 148file, which is included in your distribution. The following details the revision 149information associated with this specific port of ThreadX: 150 15104-02-2021 Release 6.1.6 changes: 152 tx_port.h Updated macro definition 153 15403-02-2021 The following files were changed/added for version 6.1.5: 155 tx_thread_schedule.s Added low power feature 156 15709-30-2020 Initial ThreadX version 6.1 for Cortex-M0 using IAR's ARM tools. 158 159 160Copyright(c) 1996-2020 Microsoft Corporation 161 162 163https://azure.com/rtos 164 165
