1
2;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
3;;
4;; Part one of the system initialization code,
5;; contains low-level
6;; initialization.
7;;
8;; Copyright 2007 IAR Systems. All rights reserved.
9;;
10;; $Revision: 14520 $
11;;
12
13        MODULE  ?cstartup
14
15        ;; Forward declaration of sections.
16        SECTION IRQ_STACK:DATA:NOROOT(3)
17        SECTION FIQ_STACK:DATA:NOROOT(3)
18        SECTION CSTACK:DATA:NOROOT(3)
19
20;
21; The module in this file are included in the libraries, and may be
22; replaced by any user-defined modules that define the PUBLIC symbol
23; __iar_program_start or a user defined start symbol.
24;
25; To override the cstartup defined in the library, simply add your
26; modified version to the workbench project.
27
28        SECTION .intvec:CODE:NOROOT(2)
29
30        PUBLIC  __vector
31        PUBLIC  __vector_0x14
32        PUBLIC  __iar_program_start
33        EXTERN  __tx_undefined
34        EXTERN  __tx_swi_interrupt
35        EXTERN  __tx_prefetch_handler
36        EXTERN  __tx_abort_handler
37        EXTERN  __tx_irq_handler
38        EXTERN  __tx_fiq_handler
39
40        ARM
41__vector:
42        ; All default exception handlers (except reset) are
43        ; defined as weak symbol definitions.
44        ; If a handler is defined by the application it will take precedence.
45        LDR     PC,Reset_Addr           ; Reset
46        LDR     PC,Undefined_Addr       ; Undefined instructions
47        LDR     PC,SWI_Addr             ; Software interrupt (SWI/SVC)
48        LDR     PC,Prefetch_Addr        ; Prefetch abort
49        LDR     PC,Abort_Addr           ; Data abort
50__vector_0x14:
51        DCD     0                       ; RESERVED
52        LDR     PC,IRQ_Addr             ; IRQ
53        LDR     PC,FIQ_Addr             ; FIQ
54
55Reset_Addr:     DCD   __iar_program_start
56Undefined_Addr: DCD   __tx_undefined
57SWI_Addr:       DCD   __tx_swi_interrupt
58Prefetch_Addr:  DCD   __tx_prefetch_handler
59Abort_Addr:     DCD   __tx_abort_handler
60IRQ_Addr:       DCD   __tx_irq_handler
61FIQ_Addr:       DCD   __tx_fiq_handler
62
63; --------------------------------------------------
64; ?cstartup -- low-level system initialization code.
65;
66; After a reser execution starts here, the mode is ARM, supervisor
67; with interrupts disabled.
68;
69
70
71
72        SECTION .text:CODE:NOROOT(2)
73
74;        PUBLIC  ?cstartup
75        EXTERN  ?main
76        REQUIRE __vector
77
78        ARM
79
80__iar_program_start:
81?cstartup:
82
83;
84; Add initialization needed before setup of stackpointers here.
85;
86
87;
88; Initialize the stack pointers.
89; The pattern below can be used for any of the exception stacks:
90; FIQ, IRQ, SVC, ABT, UND, SYS.
91; The USR mode uses the same stack as SYS.
92; The stack segments must be defined in the linker command file,
93; and be declared above.
94;
95
96
97; --------------------
98; Mode, correspords to bits 0-5 in CPSR
99
100MODE_MSK DEFINE 0x1F            ; Bit mask for mode bits in CPSR
101
102USR_MODE DEFINE 0x10            ; User mode
103FIQ_MODE DEFINE 0x11            ; Fast Interrupt Request mode
104IRQ_MODE DEFINE 0x12            ; Interrupt Request mode
105SVC_MODE DEFINE 0x13            ; Supervisor mode
106ABT_MODE DEFINE 0x17            ; Abort mode
107UND_MODE DEFINE 0x1B            ; Undefined Instruction mode
108SYS_MODE DEFINE 0x1F            ; System mode
109
110
111        MRS     r0, cpsr                ; Original PSR value
112
113        ;; Set up the interrupt stack pointer.
114
115        BIC     r0, r0, #MODE_MSK       ; Clear the mode bits
116        ORR     r0, r0, #IRQ_MODE       ; Set IRQ mode bits
117        MSR     cpsr_c, r0              ; Change the mode
118        LDR     sp, =SFE(IRQ_STACK)     ; End of IRQ_STACK
119
120        ;; Set up the fast interrupt stack pointer.
121
122        BIC     r0, r0, #MODE_MSK       ; Clear the mode bits
123        ORR     r0, r0, #FIQ_MODE       ; Set FIR mode bits
124        MSR     cpsr_c, r0              ; Change the mode
125        LDR     sp, =SFE(FIQ_STACK)     ; End of FIQ_STACK
126
127        ;; Set up the normal stack pointer.
128
129        BIC     r0 ,r0, #MODE_MSK       ; Clear the mode bits
130        ORR     r0 ,r0, #SYS_MODE       ; Set System mode bits
131        MSR     cpsr_c, r0              ; Change the mode
132        LDR     sp, =SFE(CSTACK)        ; End of CSTACK
133
134#ifdef __ARMVFP__
135        MRC     p15, 0, r1, c1, c0, 2   ; r1 = Access Control Register
136        ORR     r1, r1, #(0xf << 20)    ; Enable full access for p10,11
137        MCR     p15, 0, r1, c1, c0, 2   ; Access Control Register = r1
138        MOV     r1, #0
139        MCR     p15, 0, r1, c7, c5, 4   ; Flush prefetch buffer because of FMXR below and
140                                        ; CP 10 & 11 were only just enabled
141        MOV     r0, #0x40000000         ; Enable VFP itself
142        FMXR    FPEXC, r0               ; FPEXC = r0
143#endif
144
145;
146; Add more initialization here
147;
148
149; Continue to ?main for C-level initialization.
150
151        B       ?main
152
153        END
154
155
156
157