1;/***************************************************************************
2; * Copyright (c) 2024 Microsoft Corporation
3; *
4; * This program and the accompanying materials are made available under the
5; * terms of the MIT License which is available at
6; * https://opensource.org/licenses/MIT.
7; *
8; * SPDX-License-Identifier: MIT
9; **************************************************************************/
10;
11;
12;/**************************************************************************/
13;/**************************************************************************/
14;/**                                                                       */
15;/** ThreadX Component                                                     */
16;/**                                                                       */
17;/**   Thread                                                              */
18;/**                                                                       */
19;/**************************************************************************/
20;/**************************************************************************/
21;
22;
23;#define TX_SOURCE_CODE
24;
25;
26;/* Include necessary system files.  */
27;
28;#include "tx_api.h"
29;#include "tx_thread.h"
30;#include "tx_timer.h"
31;
32FP          .set    A15
33DP          .set    B14
34SP          .set    B15
35;
36;
37    .global    _tx_thread_execute_ptr
38    .global    _tx_thread_current_ptr
39    .global    _tx_timer_time_slice
40;
41;
42    .sect   ".text"
43;/**************************************************************************/
44;/*                                                                        */
45;/*  FUNCTION                                               RELEASE        */
46;/*                                                                        */
47;/*    _tx_thread_schedule                                 C667x/TI        */
48;/*                                                           6.1          */
49;/*  AUTHOR                                                                */
50;/*                                                                        */
51;/*    William E. Lamie, Microsoft Corporation                             */
52;/*                                                                        */
53;/*  DESCRIPTION                                                           */
54;/*                                                                        */
55;/*    This function waits for a thread control block pointer to appear in */
56;/*    the _tx_thread_execute_ptr variable.  Once a thread pointer appears */
57;/*    in the variable, the corresponding thread is resumed.               */
58;/*                                                                        */
59;/*  INPUT                                                                 */
60;/*                                                                        */
61;/*    None                                                                */
62;/*                                                                        */
63;/*  OUTPUT                                                                */
64;/*                                                                        */
65;/*    None                                                                */
66;/*                                                                        */
67;/*  CALLS                                                                 */
68;/*                                                                        */
69;/*    None                                                                */
70;/*                                                                        */
71;/*  CALLED BY                                                             */
72;/*                                                                        */
73;/*    _tx_initialize_kernel_enter          ThreadX entry function         */
74;/*    _tx_thread_system_return             Return to system from thread   */
75;/*    _tx_thread_context_restore           Restore thread's context       */
76;/*                                                                        */
77;/*  RELEASE HISTORY                                                       */
78;/*                                                                        */
79;/*    DATE              NAME                      DESCRIPTION             */
80;/*                                                                        */
81;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
82;/*                                                                        */
83;/**************************************************************************/
84;VOID   _tx_thread_schedule(VOID)
85;{
86    .global _tx_thread_schedule
87_tx_thread_schedule
88;
89;    /* Enable interrupts.  */
90;
91        MVC         CSR,B0                              ; Pickup current CSR
92        OR          1,B0,B0                             ; Build interrupt enable value
93        MVC         B0,CSR                              ; Enable interrupts
94        MVKL        _tx_thread_execute_ptr,A0           ; Build address of execute pointer
95        MVKH        _tx_thread_execute_ptr,A0           ;
96;
97;    /* Wait for a thread to execute.  */
98;    do
99;    {
100;
101_tx_thread_schedule_loop:
102;
103        LDW         *A0,A1                              ; Pickup next thread to execute
104        NOP         4                                   ; Delay slots
105 [!A1]  B           _tx_thread_schedule_loop            ; If Null, just wait here for thread
106                                                        ;   to become ready
107        MV          A1,A4                               ; Move thread pointer to A4
108        MVKL        _tx_thread_current_ptr,A1           ; Build address of current thread ptr
109        MVKH        _tx_thread_current_ptr,A1           ;
110        MVKL        _tx_timer_time_slice,A2             ; Build address of time-slice
111        MVKH        _tx_timer_time_slice,A2             ;
112;
113;    }
114;    while(_tx_thread_execute_ptr == TX_NULL);
115;
116;    /* Yes! We have a thread to execute.  Lockout interrupts and
117;       transfer control to it.  */
118;
119        AND         -2,B0,B0                            ; Build interrupt lockout value
120        MVC         B0,CSR                              ; Lockout interrupts
121;
122;    /* Setup the current thread pointer.  */
123;    _tx_thread_current_ptr =  _tx_thread_execute_ptr;
124;
125        LDW         *+A4(4),A3                          ; Pickup run-count
126        LDW         *+A4(8),SP                          ; Switch to thread's stack
127        LDW         *+A4(24),B1                         ; Pickup time-slice
128        STW         A4,*A1                              ; Setup current pointer
129        NOP                                             ; Delay
130;
131;    /* Increment the run count for this thread.  */
132;    _tx_thread_current_ptr -> tx_thread_run_count++;
133;
134        ADD         1,A3,A3                             ; Increment run-counter
135        LDW         *+SP(4),B0                          ; Pickup stack-type
136        STW         A3,*+A4(4)                          ; Store run-counter
137;
138;    /* Setup time-slice, if present.  */
139;    _tx_timer_time_slice =  _tx_thread_current_ptr -> tx_thread_time_slice;
140;
141        STW         B1,*A2                              ; Setup time-slice
142;
143;    /* Switch to the thread's stack.  */
144;    SP =  _tx_thread_execute_ptr -> tx_thread_stack_ptr;
145;
146;    /* Determine if an interrupt frame or a synchronous task suspension frame
147;   is present.  */
148;
149        NOP         2                                   ; Delay slots
150 [B0]   B           _tx_thread_interrupt_stack          ; Look for interrupt stack frame
151        LDW         *+SP(8),B0                          ; Pickup saved CSR
152        LDW         *+SP(12),B3                         ; Pickup saved B3/IPR
153        LDW         *+SP(16),B1                         ; Pickup saved AMR
154        LDW         *+SP(20),A10                        ; Restore A10
155        LDW         *+SP(24),A11                        ; Restore A11
156        LDW         *+SP(28),A12                        ; Restore A12
157        LDW         *+SP(32),A13                        ; Restore A13
158        MVC         B0,CSR                              ; Restore CSR
159        MVC         B1,AMR                              ; Restore AMR
160        LDW         *+SP(36),A14                        ; Restore A14
161        LDW         *+SP(40),A15                        ; Restore A15
162        LDW         *+SP(44),B10                        ; Restore B10
163        LDW         *+SP(48),B11                        ; Restore B11
164        LDW         *+SP(52),B12                        ; Restore B12
165        LDW         *+SP(56),B13                        ; Restore B13
166        LDW         *+SP(60),B0                         ; Restore ILC
167        LDW         *+SP(64),B1                         ; Restore RILC
168        NOP         4                                   ; Delay slots
169        MVC         B0,ILC                              ; Restore ILC
170        MVC         B1,RILC                             ; Restore RILC
171        B           B3                                  ; Return to caller
172        ADDK        64,SP                               ; Recover stack space
173        NOP         4                                   ; Delay slots
174;
175_tx_thread_interrupt_stack:
176        MVC         B0,CSR                              ; Restore CSR
177        MVC         B3,IRP                              ; Restore IPR
178        MVC         B1,AMR                              ; Restore AMR
179        LDW         *+SP(268),B0                        ; Recover saved ILC
180        LDW         *+SP(272),B1                        ; Recover saved RILC
181        LDW         *+SP(276),B2                        ; Recover saved ITSR
182        NOP         4                                   ; Delay
183        MVC         B0,ILC                              ; Setup ILC
184        MVC         B1,RILC                             ; Setup RILC
185        MVC         B2,ITSR                             ; Setup ITSR
186        LDW         *+SP(20),A0                         ; Recover A0
187        LDW         *+SP(24),A1                         ; Recover A1
188        LDW         *+SP(28),A2                         ; Recover A2
189        LDW         *+SP(32),A3                         ; Recover A3
190        LDW         *+SP(36),A4                         ; Recover A4
191        LDW         *+SP(40),A5                         ; Recover A5
192        LDW         *+SP(44),A6                         ; Recover A6
193        LDW         *+SP(48),A7                         ; Recover A7
194        LDW         *+SP(52),A8                         ; Recover A8
195        LDW         *+SP(56),A9                         ; Recover A9
196        LDW         *+SP(60),A10                        ; Recover A10
197        LDW         *+SP(64),A11                        ; Recover A11
198        LDW         *+SP(68),A12                        ; Recover A12
199        LDW         *+SP(72),A13                        ; Recover A13
200        LDW         *+SP(76),A14                        ; Recover A14
201        LDW         *+SP(80),A15                        ; Recover A15 (FP)
202        LDW         *+SP(84),B0                         ; Recover B0
203        LDW         *+SP(88),B1                         ; Recover B1
204        LDW         *+SP(92),B2                         ; Recover B2
205        LDW         *+SP(96),B3                         ; Recover B3
206        LDW         *+SP(100),B4                        ; Recover B4
207        LDW         *+SP(104),B5                        ; Recover B5
208        LDW         *+SP(108),B6                        ; Recover B6
209        LDW         *+SP(112),B7                        ; Recover B7
210        LDW         *+SP(116),B8                        ; Recover B8
211        LDW         *+SP(120),B9                        ; Recover B9
212        LDW         *+SP(124),B10                       ; Recover B10
213        LDW         *+SP(128),B11                       ; Recover B11
214        LDW         *+SP(140),A16                       ; Recover A16
215        LDW         *+SP(144),A17                       ; Recover A17
216        LDW         *+SP(148),A18                       ; Recover A18
217        LDW         *+SP(152),A19                       ; Recover A19
218        LDW         *+SP(156),A20                       ; Recover A20
219        LDW         *+SP(160),A21                       ; Recover A21
220        LDW         *+SP(164),A22                       ; Recover A22
221        LDW         *+SP(168),A23                       ; Recover A23
222        LDW         *+SP(172),A24                       ; Recover A24
223        LDW         *+SP(176),A25                       ; Recover A25
224        LDW         *+SP(180),A26                       ; Recover A26
225        LDW         *+SP(184),A27                       ; Recover A27
226        LDW         *+SP(188),A28                       ; Recover A28
227        LDW         *+SP(192),A29                       ; Recover A29
228        LDW         *+SP(196),A30                       ; Recover A30
229        LDW         *+SP(200),A31                       ; Recover A31
230        LDW         *+SP(204),B16                       ; Recover B16
231        LDW         *+SP(208),B17                       ; Recover B17
232        LDW         *+SP(212),B18                       ; Recover B18
233        LDW         *+SP(216),B19                       ; Recover B19
234        LDW         *+SP(220),B20                       ; Recover B20
235        LDW         *+SP(224),B21                       ; Recover B21
236        LDW         *+SP(228),B22                       ; Recover B22
237        LDW         *+SP(232),B23                       ; Recover B23
238        LDW         *+SP(236),B24                       ; Recover B24
239        LDW         *+SP(240),B25                       ; Recover B25
240        LDW         *+SP(244),B26                       ; Recover B26
241        LDW         *+SP(248),B27                       ; Recover B27
242        LDW         *+SP(252),B28                       ; Recover B28
243        LDW         *+SP(256),B29                       ; Recover B29
244        LDW         *+SP(260),B30                       ; Recover B30
245        LDW         *+SP(264),B31                       ; Recover B31
246        B           IRP                                 ; Return to point of interrupt
247||      LDW         *+SP(132),B12                       ; Recover B12
248        LDW         *+SP(136),B13                       ; Recover B13
249        ADDK.S2     288,SP                              ; Recover stack space
250        NOP         3                                   ; Delay slots
251;
252;}
253
254