1;/***************************************************************************
2; * Copyright (c) 2024 Microsoft Corporation
3; *
4; * This program and the accompanying materials are made available under the
5; * terms of the MIT License which is available at
6; * https://opensource.org/licenses/MIT.
7; *
8; * SPDX-License-Identifier: MIT
9; **************************************************************************/
10;
11;
12;/**************************************************************************/
13;/**************************************************************************/
14;/**                                                                       */
15;/** ThreadX Component                                                     */
16;/**                                                                       */
17;/**   Thread                                                              */
18;/**                                                                       */
19;/**************************************************************************/
20;/**************************************************************************/
21;
22;
23;#define TX_SOURCE_CODE
24;
25;
26;/* Include necessary system files.  */
27;
28;#include "tx_api.h"
29;#include "tx_thread.h"
30;#include "tx_timer.h"
31;
32#ifdef TX_ENABLE_FIQ_SUPPORT
33DISABLE_INTS    DEFINE  0xC0                    ; Disable IRQ & FIQ interrupts
34#else
35DISABLE_INTS    DEFINE  0x80                    ; Disable IRQ interrupts
36#endif
37MODE_MASK       DEFINE  0x1F                    ; Mode mask
38FIQ_MODE_BITS   DEFINE  0x11                    ; FIQ mode bits
39;
40;
41;/**************************************************************************/
42;/*                                                                        */
43;/*  FUNCTION                                               RELEASE        */
44;/*                                                                        */
45;/*    _tx_thread_fiq_nesting_end                           ARM9/IAR       */
46;/*                                                           6.1          */
47;/*  AUTHOR                                                                */
48;/*                                                                        */
49;/*    William E. Lamie, Microsoft Corporation                             */
50;/*                                                                        */
51;/*  DESCRIPTION                                                           */
52;/*                                                                        */
53;/*    This function is called by the application from FIQ mode after      */
54;/*    _tx_thread_fiq_nesting_start has been called and switches the FIQ   */
55;/*    processing from system mode back to FIQ mode prior to the ISR       */
56;/*    calling _tx_thread_fiq_context_restore.  Note that this function    */
57;/*    assumes the system stack pointer is in the same position after      */
58;/*    nesting start function was called.                                  */
59;/*                                                                        */
60;/*    This function assumes that the system mode stack pointer was setup  */
61;/*    during low-level initialization (tx_initialize_low_level.s79).      */
62;/*                                                                        */
63;/*    This function returns with FIQ interrupts disabled.                 */
64;/*                                                                        */
65;/*  INPUT                                                                 */
66;/*                                                                        */
67;/*    None                                                                */
68;/*                                                                        */
69;/*  OUTPUT                                                                */
70;/*                                                                        */
71;/*    None                                                                */
72;/*                                                                        */
73;/*  CALLS                                                                 */
74;/*                                                                        */
75;/*    None                                                                */
76;/*                                                                        */
77;/*  CALLED BY                                                             */
78;/*                                                                        */
79;/*    ISRs                                                                */
80;/*                                                                        */
81;/*  RELEASE HISTORY                                                       */
82;/*                                                                        */
83;/*    DATE              NAME                      DESCRIPTION             */
84;/*                                                                        */
85;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
86;/*                                                                        */
87;/**************************************************************************/
88;VOID   _tx_thread_fiq_nesting_end(VOID)
89;{
90    RSEG    .text:CODE:NOROOT(2)
91    PUBLIC  _tx_thread_fiq_nesting_end
92    CODE32
93_tx_thread_fiq_nesting_end
94    MOV     r3,lr                               ; Save ISR return address
95    MRS     r0, CPSR                            ; Pickup the CPSR
96    ORR     r0, r0, #DISABLE_INTS               ; Build disable interrupt value
97    MSR     CPSR_cxsf, r0                       ; Disable interrupts
98    LDR     lr, [sp]                            ; Pickup saved lr
99    ADD     sp, sp, #4                          ; Adjust stack pointer
100    BIC     r0, r0, #MODE_MASK                  ; Clear mode bits
101    ORR     r0, r0, #FIQ_MODE_BITS              ; Build IRQ mode CPSR
102    MSR     CPSR_cxsf, r0                       ; Re-enter IRQ mode
103    MOV     pc, r3                              ; Return to ISR
104;}
105;
106;
107    END
108
109