1@/***************************************************************************
2@ * Copyright (c) 2024 Microsoft Corporation
3@ *
4@ * This program and the accompanying materials are made available under the
5@ * terms of the MIT License which is available at
6@ * https://opensource.org/licenses/MIT.
7@ *
8@ * SPDX-License-Identifier: MIT
9@ **************************************************************************/
10@
11@
12@/**************************************************************************/
13@/**************************************************************************/
14@/**                                                                       */
15@/** ThreadX Component                                                     */
16@/**                                                                       */
17@/**   Thread                                                              */
18@/**                                                                       */
19@/**************************************************************************/
20@/**************************************************************************/
21#ifdef TX_INCLUDE_USER_DEFINE_FILE
22#include "tx_user.h"
23#endif
24
25#ifdef TX_ENABLE_FIQ_SUPPORT
26DISABLE_INTS    =       0xC0                    @ Disable IRQ/FIQ interrupts
27#else
28DISABLE_INTS    =       0x80                    @ Disable IRQ interrupts
29#endif
30MODE_MASK       =       0x1F                    @ Mode mask
31IRQ_MODE_BITS   =       0x12                    @ IRQ mode bits
32@
33@
34@/* No 16-bit Thumb mode veneer code is needed for _tx_thread_irq_nesting_end
35@   since it will never be called 16-bit mode.  */
36@
37    .arm
38    .text
39    .align 2
40@/**************************************************************************/
41@/*                                                                        */
42@/*  FUNCTION                                               RELEASE        */
43@/*                                                                        */
44@/*    _tx_thread_irq_nesting_end                          ARM11/GNU       */
45@/*                                                            6.2.1       */
46@/*  AUTHOR                                                                */
47@/*                                                                        */
48@/*    William E. Lamie, Microsoft Corporation                             */
49@/*                                                                        */
50@/*  DESCRIPTION                                                           */
51@/*                                                                        */
52@/*    This function is called by the application from IRQ mode after      */
53@/*    _tx_thread_irq_nesting_start has been called and switches the IRQ   */
54@/*    processing from system mode back to IRQ mode prior to the ISR       */
55@/*    calling _tx_thread_context_restore.  Note that this function        */
56@/*    assumes the system stack pointer is in the same position after      */
57@/*    nesting start function was called.                                  */
58@/*                                                                        */
59@/*    This function assumes that the system mode stack pointer was setup  */
60@/*    during low-level initialization (tx_initialize_low_level.s).        */
61@/*                                                                        */
62@/*    This function returns with IRQ interrupts disabled.                 */
63@/*                                                                        */
64@/*  INPUT                                                                 */
65@/*                                                                        */
66@/*    None                                                                */
67@/*                                                                        */
68@/*  OUTPUT                                                                */
69@/*                                                                        */
70@/*    None                                                                */
71@/*                                                                        */
72@/*  CALLS                                                                 */
73@/*                                                                        */
74@/*    None                                                                */
75@/*                                                                        */
76@/*  CALLED BY                                                             */
77@/*                                                                        */
78@/*    ISRs                                                                */
79@/*                                                                        */
80@/*  RELEASE HISTORY                                                       */
81@/*                                                                        */
82@/*    DATE              NAME                      DESCRIPTION             */
83@/*                                                                        */
84@/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
85@/*  03-08-2023     Cindy Deng               Modified comment(s), added    */
86@/*                                            #include tx_user.h,         */
87@/*                                            resulting in version 6.2.1  */
88@/*                                                                        */
89@/**************************************************************************/
90@VOID   _tx_thread_irq_nesting_end(VOID)
91@{
92    .global  _tx_thread_irq_nesting_end
93    .type    _tx_thread_irq_nesting_end,function
94_tx_thread_irq_nesting_end:
95    MOV     r3,lr                               @ Save ISR return address
96    MRS     r0, CPSR                            @ Pickup the CPSR
97    ORR     r0, r0, #DISABLE_INTS               @ Build disable interrupt value
98    MSR     CPSR_cxsf, r0                       @ Disable interrupts
99    LDMIA   sp!, {r1, lr}                       @ Pickup saved lr (and r1 throw-away for
100                                                @   8-byte alignment logic)
101    BIC     r0, r0, #MODE_MASK                  @ Clear mode bits
102    ORR     r0, r0, #IRQ_MODE_BITS              @ Build IRQ mode CPSR
103    MSR     CPSR_cxsf, r0                       @ Reenter IRQ mode
104    MOV     pc, r3                              @ Return to caller
105@}
106
107