1;/***************************************************************************
2; * Copyright (c) 2024 Microsoft Corporation
3; *
4; * This program and the accompanying materials are made available under the
5; * terms of the MIT License which is available at
6; * https://opensource.org/licenses/MIT.
7; *
8; * SPDX-License-Identifier: MIT
9; **************************************************************************/
10;
11;
12;/**************************************************************************/
13;/**************************************************************************/
14;/**                                                                       */
15;/** ThreadX Component                                                     */
16;/**                                                                       */
17;/**   Thread                                                              */
18;/**                                                                       */
19;/**************************************************************************/
20;/**************************************************************************/
21;
22;#define TX_SOURCE_CODE
23;
24;
25;/* Include necessary system files.  */
26;
27;#include "tx_api.h"
28;#include "tx_thread.h"
29;
30;
31    IF :DEF:TX_ENABLE_FIQ_SUPPORT
32DISABLE_INTS    EQU         0xC0                ; IRQ & FIQ interrupts disabled
33    ELSE
34DISABLE_INTS    EQU         0x80                ; IRQ interrupts disabled
35    ENDIF
36;
37;
38        AREA ||.text||, CODE, READONLY
39;/**************************************************************************/
40;/*                                                                        */
41;/*  FUNCTION                                               RELEASE        */
42;/*                                                                        */
43;/*    _tx_thread_interrupt_disable                        ARM11/AC5       */
44;/*                                                            6.1         */
45;/*  AUTHOR                                                                */
46;/*                                                                        */
47;/*    William E. Lamie, Microsoft Corporation                             */
48;/*                                                                        */
49;/*  DESCRIPTION                                                           */
50;/*                                                                        */
51;/*    This function is responsible for disabling interrupts               */
52;/*                                                                        */
53;/*  INPUT                                                                 */
54;/*                                                                        */
55;/*    None                                                                */
56;/*                                                                        */
57;/*  OUTPUT                                                                */
58;/*                                                                        */
59;/*    old_posture                           Old interrupt lockout posture */
60;/*                                                                        */
61;/*  CALLS                                                                 */
62;/*                                                                        */
63;/*    None                                                                */
64;/*                                                                        */
65;/*  CALLED BY                                                             */
66;/*                                                                        */
67;/*    Application Code                                                    */
68;/*                                                                        */
69;/*  RELEASE HISTORY                                                       */
70;/*                                                                        */
71;/*    DATE              NAME                      DESCRIPTION             */
72;/*                                                                        */
73;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
74;/*                                                                        */
75;/**************************************************************************/
76;UINT   _tx_thread_interrupt_disable(void)
77;{
78    EXPORT _tx_thread_interrupt_disable
79_tx_thread_interrupt_disable
80;
81;    /* Pickup current interrupt lockout posture.  */
82;
83    MRS     r0, CPSR                            ; Pickup current CPSR
84;
85;    /* Mask interrupts.  */
86;
87    ORR     r1, r0, #DISABLE_INTS               ; Mask interrupts
88    MSR     CPSR_cxsf, r1                       ; Setup new CPSR
89    IF  {INTER} = {TRUE}
90    BX      lr                                  ; Return to caller
91    ELSE
92    MOV     pc, lr                              ; Return to caller
93    ENDIF
94;}
95;
96    END
97
98