1;/***************************************************************************
2; * Copyright (c) 2024 Microsoft Corporation
3; *
4; * This program and the accompanying materials are made available under the
5; * terms of the MIT License which is available at
6; * https://opensource.org/licenses/MIT.
7; *
8; * SPDX-License-Identifier: MIT
9; **************************************************************************/
10;
11;
12;/**************************************************************************/
13;/**************************************************************************/
14;/**                                                                       */
15;/** ThreadX Component                                                     */
16;/**                                                                       */
17;/**   Thread                                                              */
18;/**                                                                       */
19;/**************************************************************************/
20;/**************************************************************************/
21;
22;
23;#define TX_SOURCE_CODE
24;
25;
26;/* Include necessary system files.  */
27;
28;#include "tx_api.h"
29;#include "tx_thread.h"
30;
31;
32    IF  :DEF:TX_ENABLE_FIQ_SUPPORT
33DISABLE_INTS    EQU     0xC0                    ; Disable IRQ & FIQ interrupts
34    ELSE
35DISABLE_INTS    EQU     0x80                    ; Disable IRQ interrupts
36    ENDIF
37MODE_MASK       EQU     0x1F                    ; Mode mask
38FIQ_MODE_BITS   EQU     0x11                    ; FIQ mode bits
39;
40;
41        AREA ||.text||, CODE, READONLY
42;/**************************************************************************/
43;/*                                                                        */
44;/*  FUNCTION                                               RELEASE        */
45;/*                                                                        */
46;/*    _tx_thread_fiq_nesting_end                          ARM11/AC5       */
47;/*                                                            6.1         */
48;/*  AUTHOR                                                                */
49;/*                                                                        */
50;/*    William E. Lamie, Microsoft Corporation                             */
51;/*                                                                        */
52;/*  DESCRIPTION                                                           */
53;/*                                                                        */
54;/*    This function is called by the application from FIQ mode after      */
55;/*    _tx_thread_fiq_nesting_start has been called and switches the FIQ   */
56;/*    processing from system mode back to FIQ mode prior to the ISR       */
57;/*    calling _tx_thread_fiq_context_restore.  Note that this function    */
58;/*    assumes the system stack pointer is in the same position after      */
59;/*    nesting start function was called.                                  */
60;/*                                                                        */
61;/*    This function assumes that the system mode stack pointer was setup  */
62;/*    during low-level initialization (tx_initialize_low_level.s).        */
63;/*                                                                        */
64;/*    This function returns with FIQ interrupts disabled.                 */
65;/*                                                                        */
66;/*  INPUT                                                                 */
67;/*                                                                        */
68;/*    None                                                                */
69;/*                                                                        */
70;/*  OUTPUT                                                                */
71;/*                                                                        */
72;/*    None                                                                */
73;/*                                                                        */
74;/*  CALLS                                                                 */
75;/*                                                                        */
76;/*    None                                                                */
77;/*                                                                        */
78;/*  CALLED BY                                                             */
79;/*                                                                        */
80;/*    ISRs                                                                */
81;/*                                                                        */
82;/*  RELEASE HISTORY                                                       */
83;/*                                                                        */
84;/*    DATE              NAME                      DESCRIPTION             */
85;/*                                                                        */
86;/*  09-30-2020     William E. Lamie         Initial Version 6.1           */
87;/*                                                                        */
88;/**************************************************************************/
89;VOID   _tx_thread_fiq_nesting_end(VOID)
90;{
91    EXPORT  _tx_thread_fiq_nesting_end
92_tx_thread_fiq_nesting_end
93    MOV     r3,lr                               ; Save ISR return address
94    MRS     r0, CPSR                            ; Pickup the CPSR
95    ORR     r0, r0, #DISABLE_INTS               ; Build disable interrupt value
96    MSR     CPSR_cxsf, r0                       ; Disable interrupts
97    LDMIA   sp!, {r1, lr}                       ; Pickup saved lr (and r1 throw-away for
98                                                ;   8-byte alignment logic)
99    BIC     r0, r0, #MODE_MASK                  ; Clear mode bits
100    ORR     r0, r0, #FIQ_MODE_BITS              ; Build IRQ mode CPSR
101    MSR     CPSR_cxsf, r0                       ; Re-enter IRQ mode
102    IF  {INTER} = {TRUE}
103    BX      r3                                  ; Return to caller
104    ELSE
105    MOV     pc, r3                              ; Return to caller
106    ENDIF
107;}
108;
109    END
110
111