1;/*************************************************************************** 2; * Copyright (c) 2024 Microsoft Corporation 3; * 4; * This program and the accompanying materials are made available under the 5; * terms of the MIT License which is available at 6; * https://opensource.org/licenses/MIT. 7; * 8; * SPDX-License-Identifier: MIT 9; **************************************************************************/ 10; 11; 12;/**************************************************************************/ 13;/**************************************************************************/ 14;/** */ 15;/** ThreadX Component */ 16;/** */ 17;/** Thread */ 18;/** */ 19;/**************************************************************************/ 20;/**************************************************************************/ 21#ifdef TX_INCLUDE_USER_DEFINE_FILE 22#include "tx_user.h" 23#endif 24 25;/**************************************************************************/ 26;/* */ 27;/* FUNCTION RELEASE */ 28;/* */ 29;/* _tx_thread_register_bank_assign ARC_HS/MetaWare */ 30;/* 6.2.1 */ 31;/* AUTHOR */ 32;/* */ 33;/* William E. Lamie, Microsoft Corporation */ 34;/* */ 35;/* DESCRIPTION */ 36;/* */ 37;/* This function builds a stack frame on the supplied thread's stack. */ 38;/* The stack frame results in a fake interrupt return to the supplied */ 39;/* function pointer. */ 40;/* */ 41;/* INPUT */ 42;/* */ 43;/* thread_ptr Pointer to thread control blk */ 44;/* register_bank Register bank number */ 45;/* (1 through max-1) */ 46;/* */ 47;/* OUTPUT */ 48;/* */ 49;/* None */ 50;/* */ 51;/* CALLS */ 52;/* */ 53;/* None */ 54;/* */ 55;/* CALLED BY */ 56;/* */ 57;/* Application */ 58;/* */ 59;/* RELEASE HISTORY */ 60;/* */ 61;/* DATE NAME DESCRIPTION */ 62;/* */ 63;/* 09-30-2020 William E. Lamie Initial Version 6.1 */ 64;/* 03-08-2023 Cindy Deng Modified comment(s), added */ 65;/* #include tx_user.h, */ 66;/* resulting in version 6.2.1 */ 67;/* */ 68;/**************************************************************************/ 69;VOID _tx_thread_register_bank_assign(VOID *thread_ptr, UINT register_bank) 70;{ 71 .global _tx_thread_register_bank_assign 72 .type _tx_thread_register_bank_assign, @function 73_tx_thread_register_bank_assign: 74; 75; /* Assume this routine is being called from initialization, with interrupts 76; disabled and from register bank 0. Also assume that the thread pointer and 77; register bank input is valid, i.e., there is no error checking on the validity of 78; the thread pointer or the register_bank. 79; 80; It is worth noting that if fast interrupts are being used, register bank 1 81; is reserved for the fast interrupt processing, so thread register bank assignments 82; should begin at bank 2. */ 83; 84 mov ilink, r0 ; Move the thread control block into ilink 85 asl r2, r1, 16 ; Move the register bank bits over to proper location 86 lr r3, [status32] ; Pickup status32 register 87 or r3, r3, r2 ; Build new status32 register 88 ld r4, [r0, 8] ; Pickup stack pointer for the thread 89 ld r5, [r4, 164] ; Pickup initial status32 from stack area 90 or r5, r5, r2 ; Modify initial status32 with register bank number 91 st r5, [r4, 164] ; Store initial status32 in stack area 92 kflag r3 ; Move to the hardware register bank 93 mov r0, ilink ; Place thread control block in r0 94 ld sp, [r0, 8] ; Setup stack pointer for this hardware register bank 95 ld fp, [sp, 24] ; Setup fp 96 ld gp, [sp, 28] ; Setup gp 97 ld blink, [sp, 16] ; Setup blink 98 ld ilink, [sp, 20] ; Setup ilink 99 lr r3, [status32] ; Pickup status32 register 100 bclr r3, r3, 16 ; Build register bank 0 value 101 bclr r3, r3, 17 ; 102 bclr r3, r3, 18 ; 103 kflag r3 ; Move back to register bank 0 104 mov r5, 3 ; Build type for hardware interrupt context 105 j_s.d [blink] ; Return to caller 106 st r5, [r4, 0] ; Set stack frame type 107;} 108 .end 109